<?xml version='1.0' encoding='UTF-8'?><?xml-stylesheet href="http://www.blogger.com/styles/atom.css" type="text/css"?><feed xmlns='http://www.w3.org/2005/Atom' xmlns:openSearch='http://a9.com/-/spec/opensearchrss/1.0/' xmlns:georss='http://www.georss.org/georss' xmlns:gd='http://schemas.google.com/g/2005' xmlns:thr='http://purl.org/syndication/thread/1.0'><id>tag:blogger.com,1999:blog-759053659177607007</id><updated>2011-04-22T06:54:01.942+05:00</updated><title type='text'>About INTEL &amp; AMD</title><subtitle type='html'></subtitle><link rel='http://schemas.google.com/g/2005#feed' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/posts/default'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default?max-results=100'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/'/><link rel='hub' href='http://pubsubhubbub.appspot.com/'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><generator version='7.00' uri='http://www.blogger.com'>Blogger</generator><openSearch:totalResults>65</openSearch:totalResults><openSearch:startIndex>1</openSearch:startIndex><openSearch:itemsPerPage>100</openSearch:itemsPerPage><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4907451325948660389</id><published>2009-02-03T20:20:00.000+05:00</published><updated>2009-02-03T20:21:44.680+05:00</updated><title type='text'>AMD Am29000</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhg-fXkdvI/AAAAAAAAAFM/nOcJp8PRdoM/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 180px; height: 180px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhg-fXkdvI/AAAAAAAAAFM/nOcJp8PRdoM/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298591588289902322" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;p&gt;The &lt;b&gt;AMD 29000&lt;/b&gt;, often simply &lt;b&gt;29k&lt;/b&gt;, was a popular family of &lt;a href="http://en.wikipedia.org/wiki/RISC" title="RISC" class="mw-redirect"&gt;RISC&lt;/a&gt;-based 32-bit &lt;a href="http://en.wikipedia.org/wiki/Microprocessor" title="Microprocessor"&gt;microprocessors&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Microcontroller" title="Microcontroller"&gt;microcontrollers&lt;/a&gt; from &lt;a href="http://en.wikipedia.org/wiki/Advanced_Micro_Devices" title="Advanced Micro Devices"&gt;Advanced Micro Devices&lt;/a&gt;. They were, for a time, the most popular RISC chips on the market, widely used in &lt;a href="http://en.wikipedia.org/wiki/Laser_printer" title="Laser printer"&gt;laser printers&lt;/a&gt; from a variety of manufacturers. In late 1995 AMD dropped development of the 29k because the design team was transferred to support the PC side of the business. What remained of AMD's embedded business was realigned towards the embedded 186 family of 80186 derivatives. The majority of AMD's resources were then concentrated on their high-performance, desktop x86 clones, using many of the ideas and individual parts of the latest 29k to produce the &lt;a href="http://en.wikipedia.org/wiki/AMD_K5" title="AMD K5"&gt;AMD K5&lt;/a&gt;.&lt;/p&gt; &lt;p&gt;The 29000 evolved from the same &lt;a href="http://en.wikipedia.org/wiki/Berkeley_RISC" title="Berkeley RISC"&gt;Berkeley RISC&lt;/a&gt; design that also led to the &lt;a href="http://en.wikipedia.org/wiki/Sun_Microsystems" title="Sun Microsystems"&gt;Sun&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/SPARC" title="SPARC"&gt;SPARC&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Intel_Corporation" title="Intel Corporation"&gt;Intel&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Intel_i960" title="Intel i960"&gt;i960&lt;/a&gt;. One "trick" used in all of the &lt;a href="http://en.wikipedia.org/wiki/University_of_California,_Berkeley" title="University of California, Berkeley"&gt;Berkeley&lt;/a&gt;-derived designs is the concept of &lt;a href="http://en.wikipedia.org/wiki/Register_window" title="Register window"&gt;register windows&lt;/a&gt;, a technique used to speed up &lt;a href="http://en.wikipedia.org/wiki/Procedure_call" title="Procedure call" class="mw-redirect"&gt;procedure calls&lt;/a&gt; significantly. The basic idea is to use a large set of &lt;a href="http://en.wikipedia.org/wiki/Processor_register" title="Processor register"&gt;registers&lt;/a&gt; as a stack, loading local data into a set of registers during a call, and marking them "dead" when the procedure returns. Values being returned from the routines would be placed in the "global page", the top eight registers in the SPARC (for instance). It is interesting to note that the competing early RISC design from &lt;a href="http://en.wikipedia.org/wiki/Stanford_University" title="Stanford University"&gt;Stanford University&lt;/a&gt; looked at this concept, but decided that improved compilers could make more efficient use of general purpose registers than a hard-wired window, something that has proven true over the years.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4907451325948660389?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4907451325948660389/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4907451325948660389' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4907451325948660389'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4907451325948660389'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-am29000.html' title='AMD Am29000'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SYhg-fXkdvI/AAAAAAAAAFM/nOcJp8PRdoM/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3009042524389918809</id><published>2009-02-03T20:19:00.000+05:00</published><updated>2009-02-03T20:20:25.631+05:00</updated><title type='text'>AMD FireStream</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhgpl0XlII/AAAAAAAAAFE/z4op83OVQTY/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 300px; height: 200px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhgpl0XlII/AAAAAAAAAFE/z4op83OVQTY/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298591229244052610" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;The &lt;b&gt;&lt;a href="http://en.wikipedia.org/wiki/Advanced_Micro_Devices" title="Advanced Micro Devices"&gt;AMD&lt;/a&gt; FireStream&lt;/b&gt; (previously branded as both &lt;b&gt;&lt;a href="http://en.wikipedia.org/wiki/ATI_technologies" title="ATI technologies" class="mw-redirect"&gt;ATI&lt;/a&gt; FireStream&lt;/b&gt; and &lt;b&gt;AMD Stream Processor&lt;/b&gt;&lt;sup id="cite_ref-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_FireStream#cite_note-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;) is a &lt;a href="http://en.wikipedia.org/wiki/Stream_processing" title="Stream processing"&gt;stream processor&lt;/a&gt; developed by ATI Technologies. It is designed to target various industries, such as the &lt;a href="http://en.wikipedia.org/wiki/High_Performance_Computing" title="High Performance Computing" class="mw-redirect"&gt;High Performance Computing&lt;/a&gt; (HPC), scientific, and financial sectors, which utilize the stream processing/&lt;a href="http://en.wikipedia.org/wiki/GPGPU" title="GPGPU"&gt;GPGPU&lt;/a&gt; (General Purpose Graphics Processing Units) concept for heavy &lt;a href="http://en.wikipedia.org/wiki/Floating_point" title="Floating point"&gt;floating-point&lt;/a&gt; computations. The AMD FireStream can also be used as a floating-point &lt;a href="http://en.wikipedia.org/wiki/Co-processor" title="Co-processor" class="mw-redirect"&gt;co-processor&lt;/a&gt; for offloading CPU calculations, which is part of the &lt;a href="http://en.wikipedia.org/wiki/Torrenza" title="Torrenza"&gt;Torrenza&lt;/a&gt; initiative.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3009042524389918809?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3009042524389918809/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3009042524389918809' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3009042524389918809'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3009042524389918809'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-firestream.html' title='AMD FireStream'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SYhgpl0XlII/AAAAAAAAAFE/z4op83OVQTY/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-5635793653298974750</id><published>2009-02-03T20:17:00.000+05:00</published><updated>2009-02-03T20:18:36.055+05:00</updated><title type='text'>AMD Live!</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://2.bp.blogspot.com/_osm1u2yPFJw/SYhgN4wQBzI/AAAAAAAAAE8/J3_aUbjIwww/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 150px; height: 168px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SYhgN4wQBzI/AAAAAAAAAE8/J3_aUbjIwww/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298590753290716978" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;p&gt;&lt;b&gt;AMD LIVE!&lt;/b&gt; is the name of &lt;a href="http://en.wikipedia.org/wiki/AMD" title="AMD" class="mw-redirect"&gt;Advanced Micro Devices'&lt;/a&gt; initiative in &lt;a href="http://en.wikipedia.org/wiki/2005" title="2005"&gt;2005&lt;/a&gt; aimed at gathering the support of professional musicians and other media producers behind its hardware products. The primary focus of this initiative was the &lt;a href="http://en.wikipedia.org/wiki/Opteron" title="Opteron"&gt;Opteron&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Server_%28computing%29" title="Server (computing)"&gt;server&lt;/a&gt;- and &lt;a href="http://en.wikipedia.org/wiki/Workstation_%28computer_hardware%29" title="Workstation (computer hardware)" class="mw-redirect"&gt;workstation&lt;/a&gt;-class &lt;a href="http://en.wikipedia.org/wiki/Central_processing_unit" title="Central processing unit"&gt;central processing units&lt;/a&gt; (CPUs).&lt;/p&gt; &lt;p&gt;AMD subsequently extended AMD LIVE! into a platform &lt;a href="http://en.wikipedia.org/wiki/Marketing" title="Marketing"&gt;marketing&lt;/a&gt; initiative focusing the &lt;a href="http://en.wikipedia.org/wiki/Consumer_electronics" title="Consumer electronics"&gt;consumer electronics&lt;/a&gt; segment in 2006 and focused on performance segment desktop-class processors. &lt;b&gt;AMD LIVE!&lt;/b&gt; for consumer electronics segment was announced on &lt;a href="http://en.wikipedia.org/wiki/January_4" title="January 4"&gt;January 4&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2006" title="2006"&gt;2006&lt;/a&gt; officially through press release.&lt;/p&gt; &lt;p&gt;The AMD LIVE! is an initiative, which can be divided into two parts, one in terms of software and the other, computer hardware. The software portion focuses on users' internet and multimedia experiences, while the hardware sector focuses on the ability of a system to handle multimedia files and the convergence of &lt;a href="http://en.wikipedia.org/wiki/Consumer_electronics" title="Consumer electronics"&gt;consumer electronics&lt;/a&gt; (CE) and &lt;a href="http://en.wikipedia.org/wiki/Personal_computer" title="Personal computer"&gt;personal computing&lt;/a&gt; (PC) into one &lt;a href="http://en.wikipedia.org/wiki/Computer_chassis" title="Computer chassis" class="mw-redirect"&gt;computer chassis&lt;/a&gt;.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-5635793653298974750?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/5635793653298974750/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=5635793653298974750' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5635793653298974750'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5635793653298974750'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-live.html' title='AMD Live!'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SYhgN4wQBzI/AAAAAAAAAE8/J3_aUbjIwww/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-2582904123932648075</id><published>2009-02-03T20:16:00.000+05:00</published><updated>2009-02-03T20:17:33.698+05:00</updated><title type='text'>AMD 700 chipset series</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://3.bp.blogspot.com/_osm1u2yPFJw/SYhf8-J5goI/AAAAAAAAAE0/OfjOpSVEtDM/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 100px; height: 118px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/SYhf8-J5goI/AAAAAAAAAE0/OfjOpSVEtDM/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298590462682694274" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;p&gt;The &lt;b&gt;AMD 700 chipset series&lt;/b&gt; (also called as &lt;b&gt;AMD 7-Series Chipsets&lt;/b&gt;) is a set of current and upcoming chipsets designed by &lt;a href="http://en.wikipedia.org/wiki/ATI_Technologies" title="ATI Technologies"&gt;ATI&lt;/a&gt; for &lt;a href="http://en.wikipedia.org/wiki/Advanced_Micro_Devices" title="Advanced Micro Devices"&gt;AMD&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Phenom_%28processor%29" title="Phenom (processor)"&gt;Phenom&lt;/a&gt; processors to be sold under the AMD brand. Several members were launched in the end of 2007 and the first half of 2008, others are scheduled to launch throughout the rest of 2008.&lt;/p&gt; &lt;p&gt;The existence of the chipsets was proven on October 2006 through two hardware websites in Chile &lt;sup id="cite_ref-1" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;sup id="cite_ref-ChileNew_2-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-ChileNew-2" title=""&gt;&lt;span&gt;[&lt;/span&gt;3&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; and Spain &lt;sup id="cite_ref-3" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-3" title=""&gt;&lt;span&gt;[&lt;/span&gt;4&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; which posted the leaked slides of an ATI internal event, "ATI chipset update". In the slides, ATI has shown a series of RD700 series chipset logics. Codenamed &lt;i&gt;RD790&lt;/i&gt;, &lt;i&gt;RX790&lt;/i&gt;, &lt;i&gt;RS780&lt;/i&gt; and &lt;i&gt;RS740&lt;/i&gt; respectively. A codenamed &lt;i&gt;SB700&lt;/i&gt; &lt;a href="http://en.wikipedia.org/wiki/Southbridge_%28computing%29" title="Southbridge (computing)"&gt;southbridge&lt;/a&gt; was also mentioned in the event. The 790X (codenamed &lt;i&gt;RD780&lt;/i&gt;) chipset was spotted in Computex 2007, exhibited by &lt;a href="http://en.wikipedia.org/wiki/ASUSTek" title="ASUSTek" class="mw-redirect"&gt;ASUS&lt;/a&gt; &lt;sup id="cite_ref-4" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-4" title=""&gt;&lt;span&gt;[&lt;/span&gt;5&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;, while the SB750 southbridge was reported by VR-Zone &lt;sup id="cite_ref-VR1_5-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-VR1-5" title=""&gt;&lt;span&gt;[&lt;/span&gt;6&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;. The &lt;i&gt;RS780D&lt;/i&gt; was first reported by HKEPC &lt;sup id="cite_ref-HKEPC4_6-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-HKEPC4-6" title=""&gt;&lt;span&gt;[&lt;/span&gt;7&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; while the &lt;i&gt;RX780H&lt;/i&gt; was first seen on ECS internal presentations. &lt;sup id="cite_ref-PCW496_7-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-PCW496-7" title=""&gt;&lt;span&gt;[&lt;/span&gt;8&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/p&gt; &lt;p&gt;After the acquisition of ATI Technologies, AMD started to participate in the development of the chipset series. And as a result, the first performance and enthusiast segment chipsets products under the AMD brand, The &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#790FX" title="AMD 700 chipset series"&gt;790FX&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#790X" title="AMD 700 chipset series"&gt;790X&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#770" title="AMD 700 chipset series"&gt;770&lt;/a&gt; chipsets were launched on &lt;a href="http://en.wikipedia.org/wiki/November_19" title="November 19"&gt;November 19&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2007" title="2007"&gt;2007&lt;/a&gt; as part of the &lt;i&gt;Spider&lt;/i&gt; codenamed desktop performance platform. The &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#780G.2F780V" title="AMD 700 chipset series"&gt;780 chipset series&lt;/a&gt;, first launched in &lt;a href="http://en.wikipedia.org/wiki/China" title="China"&gt;China&lt;/a&gt; on &lt;a href="http://en.wikipedia.org/wiki/January_23" title="January 23"&gt;January 23&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2008" title="2008"&gt;2008&lt;/a&gt;, and released worldwide on &lt;a href="http://en.wikipedia.org/wiki/March_5" title="March 5"&gt;March 5&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2008" title="2008"&gt;2008&lt;/a&gt; during &lt;a href="http://en.wikipedia.org/wiki/CeBIT" title="CeBIT"&gt;CeBIT&lt;/a&gt; 2008 &lt;sup id="cite_ref-8" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#cite_note-8" title=""&gt;&lt;span&gt;[&lt;/span&gt;9&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;, mobile chipsets (&lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#740G" title="AMD 700 chipset series"&gt;M740G&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#780G.2F780V" title="AMD 700 chipset series"&gt;M780G&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#780G" title="AMD 700 chipset series"&gt;M780T&lt;/a&gt; chipsets) were released on &lt;a href="http://en.wikipedia.org/wiki/June_4" title="June 4"&gt;June 4&lt;/a&gt;, 2008 during &lt;a href="http://en.wikipedia.org/wiki/Computex" title="Computex" class="mw-redirect"&gt;Computex&lt;/a&gt; 2008 as part of the &lt;a href="http://en.wikipedia.org/wiki/AMD_mobile_platform#Puma_platform" title="AMD mobile platform"&gt;Puma mobile platform&lt;/a&gt; and the &lt;a href="http://en.wikipedia.org/wiki/AMD_700_chipset_series#790GX" title="AMD 700 chipset series"&gt;790GX&lt;/a&gt; chipset was released on &lt;a href="http://en.wikipedia.org/wiki/August_6" title="August 6"&gt;August 6&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2008" title="2008"&gt;2008&lt;/a&gt;, while some other members are expected to be released at a later date in 2008.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-2582904123932648075?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/2582904123932648075/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=2582904123932648075' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/2582904123932648075'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/2582904123932648075'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-700-chipset-series.html' title='AMD 700 chipset series'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/SYhf8-J5goI/AAAAAAAAAE0/OfjOpSVEtDM/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4030971146114215313</id><published>2009-02-03T20:14:00.000+05:00</published><updated>2009-02-03T20:15:41.117+05:00</updated><title type='text'>Athlon 64</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhfeCAxZXI/AAAAAAAAAEs/3DbK4L_sc-U/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 200px; height: 194px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhfeCAxZXI/AAAAAAAAAEs/3DbK4L_sc-U/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298589931142210930" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;The &lt;b&gt;Athlon 64&lt;/b&gt; is an eighth-generation, &lt;a href="http://en.wikipedia.org/wiki/AMD64" title="AMD64" class="mw-redirect"&gt;AMD64&lt;/a&gt;-architecture &lt;a href="http://en.wikipedia.org/wiki/Microprocessor" title="Microprocessor"&gt;microprocessor&lt;/a&gt; produced by &lt;a href="http://en.wikipedia.org/wiki/AMD" title="AMD" class="mw-redirect"&gt;AMD&lt;/a&gt;, released on &lt;a href="http://en.wikipedia.org/wiki/September_23" title="September 23"&gt;September 23&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/2003" title="2003"&gt;2003&lt;/a&gt;.&lt;sup id="cite_ref-release_0-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon_64#cite_note-release-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; It is the third processor to bear the name &lt;i&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon" title="Athlon"&gt;Athlon&lt;/a&gt;&lt;/i&gt;, and the immediate successor to the &lt;a href="http://en.wikipedia.org/wiki/Athlon_XP" title="Athlon XP" class="mw-redirect"&gt;Athlon XP&lt;/a&gt;.&lt;sup id="cite_ref-AthlonXP_1-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon_64#cite_note-AthlonXP-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; The second processor (after the &lt;a href="http://en.wikipedia.org/wiki/Opteron" title="Opteron"&gt;Opteron&lt;/a&gt;) to implement AMD64 architecture and the first &lt;a href="http://en.wikipedia.org/wiki/64-bit" title="64-bit"&gt;64-bit&lt;/a&gt; processor targeted at the average consumer,&lt;sup id="cite_ref-nameRelease_2-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon_64#cite_note-nameRelease-2" title=""&gt;&lt;span&gt;[&lt;/span&gt;3&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; it was AMD's primary consumer microprocessor, and competes primarily with &lt;a href="http://en.wikipedia.org/wiki/Intel" title="Intel" class="mw-redirect"&gt;Intel&lt;/a&gt;'s &lt;a href="http://en.wikipedia.org/wiki/Pentium_4" title="Pentium 4"&gt;Pentium 4&lt;/a&gt;, especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers.&lt;sup id="cite_ref-K8CPUID_3-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon_64#cite_note-K8CPUID-3" title=""&gt;&lt;span&gt;[&lt;/span&gt;4&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit &lt;a href="http://en.wikipedia.org/wiki/X86" title="X86"&gt;x86&lt;/a&gt; instructions.&lt;sup id="cite_ref-Architecture_4-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Athlon_64#cite_note-Architecture-4" title=""&gt;&lt;span&gt;[&lt;/span&gt;5&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Athlon 64s have been produced for &lt;a href="http://en.wikipedia.org/wiki/Socket_754" title="Socket 754"&gt;Socket 754&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Socket_939" title="Socket 939"&gt;Socket 939&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Socket_940" title="Socket 940"&gt;Socket 940&lt;/a&gt;, and &lt;a href="http://en.wikipedia.org/wiki/Socket_AM2" title="Socket AM2"&gt;Socket AM2&lt;/a&gt;.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4030971146114215313?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4030971146114215313/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4030971146114215313' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4030971146114215313'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4030971146114215313'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/athlon-64.html' title='Athlon 64'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SYhfeCAxZXI/AAAAAAAAAEs/3DbK4L_sc-U/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-1706289272682574454</id><published>2009-02-03T20:13:00.000+05:00</published><updated>2009-02-03T20:14:04.399+05:00</updated><title type='text'>Models</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhfLTVFt4I/AAAAAAAAAEk/8_I4x0CYZRU/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 180px; height: 180px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhfLTVFt4I/AAAAAAAAAEk/8_I4x0CYZRU/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298589609373316994" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;K6 (Model 6)&lt;/span&gt;&lt;/h3&gt; &lt;ul&gt;&lt;li&gt;8.8 million transistors in 350 nm&lt;/li&gt;&lt;li&gt;L1-Cache: 32 + 32 KB (Data + Instructions)&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/MMX_%28instruction_set%29" title="MMX (instruction set)"&gt;MMX&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Socket_7" title="Socket 7"&gt;Socket 7&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Front_side_bus" title="Front side bus"&gt;Front side bus&lt;/a&gt;: 66 MHz&lt;/li&gt;&lt;li&gt;First release: &lt;a href="http://en.wikipedia.org/wiki/April_2" title="April 2"&gt;April 2&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/1997" title="1997"&gt;1997&lt;/a&gt;&lt;/li&gt;&lt;li&gt;VCore: 2.9 V (166/200) 3.2/3.3 V (233)&lt;/li&gt;&lt;li&gt;Clockrate: 166, 200, 233 MHz&lt;/li&gt;&lt;/ul&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-1706289272682574454?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/1706289272682574454/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=1706289272682574454' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1706289272682574454'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1706289272682574454'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/models.html' title='Models'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SYhfLTVFt4I/AAAAAAAAAEk/8_I4x0CYZRU/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-1479979656583883514</id><published>2009-02-03T20:12:00.000+05:00</published><updated>2009-02-03T20:13:15.163+05:00</updated><title type='text'>AMD K6</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhe-MDCzxI/AAAAAAAAAEc/mHemVCt6Q60/s1600-h/150px-AMD_K6_logo.png"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 150px; height: 144px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhe-MDCzxI/AAAAAAAAAEc/mHemVCt6Q60/s320/150px-AMD_K6_logo.png" alt="" id="BLOGGER_PHOTO_ID_5298589384080281362" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;The &lt;b&gt;K6&lt;/b&gt; microprocessor was launched by &lt;a href="http://en.wikipedia.org/wiki/AMD" title="AMD" class="mw-redirect"&gt;AMD&lt;/a&gt; in 1997. The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for &lt;a href="http://en.wikipedia.org/wiki/Pentium" title="Pentium"&gt;Pentium&lt;/a&gt; branded &lt;a href="http://en.wikipedia.org/wiki/CPU" title="CPU" class="mw-redirect"&gt;CPUs&lt;/a&gt;. It was marketed as a product which could perform as well as its &lt;a href="http://en.wikipedia.org/wiki/Intel" title="Intel" class="mw-redirect"&gt;Intel&lt;/a&gt; Pentium II equivalent but at a significantly lower price. The &lt;b&gt;K6&lt;/b&gt; had a considerable impact on the PC market and presented Intel with a serious competition&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-1479979656583883514?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/1479979656583883514/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=1479979656583883514' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1479979656583883514'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1479979656583883514'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-k6.html' title='AMD K6'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SYhe-MDCzxI/AAAAAAAAAEc/mHemVCt6Q60/s72-c/150px-AMD_K6_logo.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-6809553067411239498</id><published>2009-02-03T20:10:00.000+05:00</published><updated>2009-02-03T20:11:39.691+05:00</updated><title type='text'>AMD K5</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhelQ5tHoI/AAAAAAAAAEU/rAwRAlwCqS8/s1600-h/180px-AMD_K5_PR166_Front.jpg"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 180px; height: 180px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SYhelQ5tHoI/AAAAAAAAAEU/rAwRAlwCqS8/s320/180px-AMD_K5_PR166_Front.jpg" alt="" id="BLOGGER_PHOTO_ID_5298588955886558850" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;The &lt;b&gt;K5&lt;/b&gt; was &lt;a href="http://en.wikipedia.org/wiki/Advanced_Micro_Devices" title="Advanced Micro Devices"&gt;AMD's&lt;/a&gt; first &lt;a href="http://en.wikipedia.org/wiki/X86_architecture" title="X86 architecture" class="mw-redirect"&gt;x86&lt;/a&gt; processor developed entirely in-house, introduced in March 1996.&lt;sup id="cite_ref-CPU-INFO_K5_0-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_K5#cite_note-CPU-INFO_K5-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;. Its primary competition was &lt;a href="http://en.wikipedia.org/wiki/Intel_Corporation" title="Intel Corporation"&gt;Intel's&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Pentium" title="Pentium"&gt;Pentium&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Microprocessor" title="Microprocessor"&gt;microprocessor&lt;/a&gt; range. Although it was originally scheduled for launch in 1995, due to design issues, it was delayed until 1996.&lt;sup id="cite_ref-CPU-World_K5_1-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_K5#cite_note-CPU-World_K5-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; AMD as a company was not as mature as Intel regarding microprocessor design, thus a lot of deadlines were missed and there was a lack of manufacturing expertise in scaling designs. The K5 was an ambitious design, closer to a Pentium Pro than a Pentium regarding technical solutions and internal architecture. However, the final product was closer to the Pentium regarding performance.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-6809553067411239498?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/6809553067411239498/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=6809553067411239498' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6809553067411239498'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6809553067411239498'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-k5.html' title='AMD K5'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SYhelQ5tHoI/AAAAAAAAAEU/rAwRAlwCqS8/s72-c/180px-AMD_K5_PR166_Front.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3652233696291331514</id><published>2009-02-03T20:09:00.001+05:00</published><updated>2009-02-03T20:09:55.615+05:00</updated><title type='text'>AMD K10</title><content type='html'>The &lt;b&gt;AMD K10&lt;/b&gt; is &lt;a href="http://en.wikipedia.org/wiki/Advanced_Micro_Devices" title="Advanced Micro Devices"&gt;AMD&lt;/a&gt;'s latest &lt;a href="http://en.wikipedia.org/wiki/Microprocessor" title="Microprocessor"&gt;microprocessor&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Microarchitecture" title="Microarchitecture"&gt;architecture&lt;/a&gt;. Though there were once reports that the K10 had been cancelled &lt;sup id="cite_ref-theinquirer_0-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/AMD_K10#cite_note-theinquirer-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;, the first &lt;a href="http://en.wikipedia.org/wiki/Opteron#micro-architecture_update" title="Opteron"&gt;third-generation Opteron&lt;/a&gt; products for servers were launched on September 10, 2007, with the &lt;a href="http://en.wikipedia.org/wiki/Phenom_%28processor%29" title="Phenom (processor)"&gt;Phenom&lt;/a&gt; processors for desktops following and launching on November 11, 2007 as the immediate successors to the K8 series of processors (&lt;a href="http://en.wikipedia.org/wiki/Athlon_64" title="Athlon 64"&gt;Athlon 64&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Opteron" title="Opteron"&gt;Opteron&lt;/a&gt;, 64-bit &lt;a href="http://en.wikipedia.org/wiki/Sempron" title="Sempron"&gt;Sempron&lt;/a&gt;).&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3652233696291331514?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3652233696291331514/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3652233696291331514' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3652233696291331514'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3652233696291331514'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/amd-k10.html' title='AMD K10'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-5303451074700762248</id><published>2009-02-03T20:08:00.000+05:00</published><updated>2009-02-03T20:09:23.713+05:00</updated><title type='text'>Am486</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhd_cZkQXI/AAAAAAAAAEM/vYA3_G8D8f8/s1600-h/180px-AMD_486DE2_66.jpg"&gt;&lt;img style="margin: 0pt 0pt 10px 10px; float: right; cursor: pointer; width: 180px; height: 181px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SYhd_cZkQXI/AAAAAAAAAEM/vYA3_G8D8f8/s320/180px-AMD_486DE2_66.jpg" alt="" id="BLOGGER_PHOTO_ID_5298588306137956722" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;&lt;p&gt;The &lt;b&gt;Am486&lt;/b&gt; is a &lt;a href="http://en.wikipedia.org/wiki/80486" title="80486" class="mw-redirect"&gt;80486&lt;/a&gt;-class family of &lt;a href="http://en.wikipedia.org/wiki/Computer" title="Computer"&gt;computer&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Central_processing_unit" title="Central processing unit"&gt;processors&lt;/a&gt; that was produced by &lt;a href="http://en.wikipedia.org/wiki/AMD" title="AMD" class="mw-redirect"&gt;AMD&lt;/a&gt; in the 1990s. &lt;a href="http://en.wikipedia.org/wiki/Intel" title="Intel" class="mw-redirect"&gt;Intel&lt;/a&gt; beat AMD to market by nearly four years, but AMD priced its 40 MHz 486 at or below Intel's price for a 33 MHz chip, offering about 20% better performance for the same price. Early AMD 486 chips were drop-in replacements for their Intel counterparts, but later AMD clock-doubled 486s ran at 3.3 volts instead of Intel's 5 volts, which limited their suitability as upgrade chips until third-party voltage adapters appeared on the market.&lt;/p&gt; &lt;p&gt;While competing 486 chips, such as those from &lt;a href="http://en.wikipedia.org/wiki/Cyrix" title="Cyrix"&gt;Cyrix&lt;/a&gt;, benchmarked lower than the equivalent Intel chip, AMD's 486 matched Intel's performance on a clock-for-clock basis.&lt;/p&gt; &lt;p&gt;While the &lt;a href="http://en.wikipedia.org/wiki/Am386" title="Am386"&gt;Am386&lt;/a&gt; was primarily used by small computer manufacturers, the Am486DX, DX2, and SX2 chips gained acceptance among larger computer manufacturers, especially &lt;a href="http://en.wikipedia.org/wiki/Acer_%28company%29" title="Acer (company)" class="mw-redirect"&gt;Acer&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Compaq" title="Compaq"&gt;Compaq&lt;/a&gt;, in the 1994 time frame.&lt;/p&gt; &lt;p&gt;AMD's higher clocked 486 chips provided superior performance to many of the early &lt;a href="http://en.wikipedia.org/wiki/Pentium" title="Pentium"&gt;Pentium&lt;/a&gt; chips, especially the 60 and 66 MHz launch products. While equivalent &lt;a href="http://en.wikipedia.org/wiki/Intel_80486DX4" title="Intel 80486DX4"&gt;Intel 80486DX4&lt;/a&gt; chips were priced high and required a minor socket modification, AMD priced low. Intel's DX4 chips initially had twice the cache of the AMD chips, giving them a slight performance edge, but AMD's DX4-100 usually cost less than Intel's DX2-66.&lt;/p&gt; &lt;p&gt;The enhanced Am486 series supported new features like extended power-saving modes and Write-Back L1-Cache, later versions even got an upgrade to 16 KiB Write-Back L1-Cache.&lt;/p&gt; &lt;p&gt;The 133 MHz AMD &lt;a href="http://en.wikipedia.org/wiki/Am5x86" title="Am5x86"&gt;Am5x86&lt;/a&gt; was a higher clocked enhanced Am486.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-5303451074700762248?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/5303451074700762248/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=5303451074700762248' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5303451074700762248'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5303451074700762248'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/am486.html' title='Am486'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SYhd_cZkQXI/AAAAAAAAAEM/vYA3_G8D8f8/s72-c/180px-AMD_486DE2_66.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3783529254785379116</id><published>2009-02-01T12:35:00.000+05:00</published><updated>2009-02-01T12:36:05.969+05:00</updated><title type='text'>Structured settlement factoring</title><content type='html'>&lt;h1 id="firstHeading" class="firstHeading"&gt;transaction&lt;/h1&gt;A &lt;b&gt;structured settlement factoring transaction&lt;/b&gt; describes the selling of future &lt;a href="http://en.wikipedia.org/wiki/Structured_settlement" title="Structured settlement"&gt;structured settlement&lt;/a&gt; payments (or, more accurately, rights to receive the future structured settlement payments). People who receive structured settlement payments (for example, the payment of personal injury damages over time instead of in a lump sum at settlement) may decide at some point that they need more money in the short term than the periodic payment provides over time. People's reasons are varied but can include unforeseen medical expenses for oneself or a dependent, the need for improved housing or transportation, education expenses and the like. To meet this need, the structured settlement recipient can sell (or, less commonly, encumber) all or part of their future periodic payments for a present &lt;a href="http://en.wikipedia.org/wiki/Lump_sum" title="Lump sum"&gt;lump sum&lt;/a&gt;.&lt;h2&gt;&lt;span class="mw-headline"&gt;History&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;Structured settlements experienced an explosion in use beginning in the 1980s.[1] The growth is most likely attributable to the favorable federal income tax treatment such settlements receive as a result of the 1982 amendment of the tax code to add &lt;a href="http://frwebgate.access.gpo.gov/cgi-bin/getdoc.cgi?dbname=browse_usc&amp;amp;docid=Cite:+26USC130" class="external text" title="http://frwebgate.access.gpo.gov/cgi-bin/getdoc.cgi?dbname=browse_usc&amp;amp;docid=Cite:+26USC130" rel="nofollow"&gt;§ 130&lt;/a&gt;.[2] [3] Internal Revenue Code &lt;a href="http://frwebgate.access.gpo.gov/cgi-bin/getdoc.cgi?dbname=browse_usc&amp;amp;docid=Cite:+26USC130" class="external text" title="http://frwebgate.access.gpo.gov/cgi-bin/getdoc.cgi?dbname=browse_usc&amp;amp;docid=Cite:+26USC130" rel="nofollow"&gt;§ 130&lt;/a&gt; provides, inter alia, substantial tax incentives to insurance companies that establish “qualified” structured settlements.[4] There are other advantages for the original &lt;a href="http://en.wikipedia.org/wiki/Tort" title="Tort"&gt;tort&lt;/a&gt; defendant (or casualty insurer) in settling for payments over time, in that they benefit from the time value of money (most demonstrable in the fact that an &lt;a href="http://en.wikipedia.org/wiki/Annuity_%28financial_contracts%29" title="Annuity (financial contracts)"&gt;annuity&lt;/a&gt; can be purchased to fund the payment of future periodic payments, and the cost of such annuity is far less than the sum total of all payments to be made over time). Finally, the tort plaintiff also benefits in several ways from a structured settlement, notably in the ability to receive the periodic payments from an annuity that gains investment value over the life of the payments, and the settling plaintiff receives the total payments, including that “inside build-up” value, tax-free.[5]&lt;/p&gt; &lt;p&gt;However, a substantial downside to structured settlements comes from their inherent inflexibility.[6] To take advantage of the tax benefits allotted to defendants who choose to settle cases using structured settlements, the periodic payments must be set up to meet basic requirements [set forth in IRC 130(c)]. Among other things, the payments must be fixed and determinable, and cannot be accelerated, deferred, increased or decreased by the recipient.[7] For many structured settlement recipients, the periodic payment stream is their only asset. Therefore, over time and as recipients’ personal situations change in ways unpredicted at the settlement table, demand for liquidity options rises. To offset the liquidity issue, most structured settlement recipients, as a part of their total settlement, will receive an immediate sum to be invested to meet the needs not best addressed through the use of a structured settlement. Beginning in the late 1980s, a few small financial institutions started to meet this demand and offer new flexibility for structured settlement payees.[8]&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Process&lt;/span&gt;&lt;/h2&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Pre-2002&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;Congress enacted law to provide special tax breaks for payments received by tort victims in structured settlements, and for the companies that funded them. The payments were tax free, whereas if the tort victim had been given a lump sum and invested it themselves, the payments from those investments would be taxable.&lt;/p&gt; &lt;p&gt;Companies liked structured settlements because it allowed them to avoid taxes to a certain extent, and plaintiffs liked them because it allowed them to receive tax-free payments of what became, over time, a much larger amount of money than the original amount paid out by the settling party. Such settlements were also considered an especially good idea for minors, as they held the money safe for adulthood and ensured that youth would not find the money wasted or ill-spent. “Despite the best intentions of plaintiffs, lump sum settlement awards are often quickly dissipated because of excessive spending, poor financial management, or a combination of both. Statistics showed that twenty-five to thirty percent of all cash awards are exhausted within two months, and ninety percent are exhausted within five years.” Andrada, “Structured Settlements – The Assignability Problem,” 9 S. Cal. Interdis. L.J. 465, 468 (Spring 2000).&lt;/p&gt; &lt;p&gt;An explanation of IRS Code section 130 was given during discussions of possible taxation of companies that bought future payments under those structured settlements. “By enacting the PPSA, Congress expressed its support of structured settlements, and sought to shield victims and their families from pressures to prematurely dissipate their recoveries.” 145 Cong. Rec. S52281-01 (daily ed. May 13, 1999) (statement of Sen. Chaffee).&lt;/p&gt; &lt;p&gt;Congress was willing to afford such tax advantages based on the belief that the loss in income taxes would be more than made up by lower expenditures on public assistance programs for those who suffered significant injuries. A strict requirement for a structured settlement to qualify for this tax break was that the tort victim was barred from accessing their periodic payments before they came due. It was for this reason that the annuity had to be owned by another who had control over it. The tort victim could not be seen to have “constructive receipt” of the annuity funds prior to their periodic payments. If the tort victim could cash in the annuity at any time, it was possible that the IRS might find constructive receipt.&lt;/p&gt; &lt;p&gt;“Congress conditioned the favorable rules on a requirement that the periodic payments cannot be accelerated, deferred, increased or decreased by the injured person. Both the House Ways and Means and Senate Finance Committee Reports stated that the periodic payments as personal injury damages are still excludable fro income only if the recipient is not in constructive receipt of or does not have the current economic benefit of the sum required to produce the periodic payments.”&lt;/p&gt; &lt;p&gt;Testimony of Tax Legislative Counsel Joseph M. Mikrut to the Subcommittee on Oversight of the Committee of Ways and Means, March 18, 1999. “These factoring transactions directly undermine the policy objective underlying the structured settlement tax regime, that of protecting the long term financial needs of injuries persons . . . “ (Id.)&lt;/p&gt; &lt;p&gt;Mr. Mikrut was testifying in favor of imposing a punitive tax on factoring companies that engaged in pursuit of structured settlement payments. Despite the use of non-assignment clauses in annuity contracts to secure the tax advantages for tort victims. companies cropped up that tried to advantage of these individuals in ”factoring” transactions, purchasing their periodic payments in return for a deeply discounted lump sump payment. Congress felt that factoring company purchases of structured settlement payments “so directly subvert the Congressional policy underlying structured settlements and raise such serious concerns for the injured victims,” that bills were proposed in both the Senate and the House to penalize companies which engage in such transactions. (Id.)&lt;/p&gt; &lt;p&gt;Before the enactment of &lt;a href="http://uscode.house.gov/download/pls/26C55.txt" class="external text" title="http://uscode.house.gov/download/pls/26C55.txt" rel="nofollow"&gt;IRC 5891&lt;/a&gt;, which became effective on July 1, 2002, some states regulated the transfer of structured settlement payment rights, while others did not. Most states that regulated transfers at this time followed a general pattern, substantially similar to the present day process which is mandated in &lt;a href="http://uscode.house.gov/download/pls/26C55.txt" class="external text" title="http://uscode.house.gov/download/pls/26C55.txt" rel="nofollow"&gt;IRC 5891&lt;/a&gt; (see below for more details of the post-2002 process). However, the majority of the transfers processed from 1988 to 2002 were not court ordered.[9] After negotiating the terms of the transaction (including the payments to be sold and the price to be paid for those payments), a formal purchase contract was executed, effecting an assignment of the subject payments upon closing. Part of this assignment process also included the grant of a security interest in the structured settlement payments, to secure performance of the seller’s obligations. Filing a public &lt;a href="http://en.wikipedia.org/wiki/Lien" title="Lien"&gt;lien&lt;/a&gt; based on that security agreement created notice of this assignment and interest. The insurance company issuing the structured settlement annuity checks was typically not given actual notice of the transfer, due to antagonism by the insurance industry against factoring and transfer companies. Many annuity issuers were concerned that factoring transactions, which were not contemplated when Congress enacted IRC 130, might upset the tax treatment of qualified assignments. HR 2884 (discussed below) resolved this question for annuity issuers.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Federal legislation&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;In January 2002, Congress accepted Mr. Mikrut’s suggestion and changed tax law to make a statement about sales of structured settlement payments. It decided that the IRS would be able to impose a 40% tax on any difference between the value of the future payments sold and the amount paid to the person who wanted to sell. The sole exception was where the sale was approved by a Court under certain conditions. IRS Code section 5891 became effective in July 2002.&lt;/p&gt; &lt;p&gt;In 2001, Congress passed &lt;a href="http://thomas.loc.gov/cgi-bin/query/z?c107:H.R.2884:" class="external text" title="http://thomas.loc.gov/cgi-bin/query/z?c107:H.R.2884:" rel="nofollow"&gt;HR 2884&lt;/a&gt;, signed into law by the President in 2002 and effective July 1, 2002, codified at &lt;a href="http://uscode.house.gov/download/pls/26C55.txt" class="external text" title="http://uscode.house.gov/download/pls/26C55.txt" rel="nofollow"&gt;Internal Revenue Code § 5891&lt;/a&gt;.[10] Through a punitive excise tax penalty, this has created the de facto regulatory paradigm for the factoring industry. In essence, to avoid the excise tax penalty, &lt;a href="http://uscode.house.gov/download/pls/26C55.txt" class="external text" title="http://uscode.house.gov/download/pls/26C55.txt" rel="nofollow"&gt;IRC 5891&lt;/a&gt; requires that all structured settlement factoring transactions be approved by a state court, in accordance with a qualified state statute. Qualified state statutes must make certain baseline findings, including that the transfer is in the best interest of the seller, taking into account the welfare and support of any dependents. In response, many states enacted statutes regulating structured settlement transfers in accord with this mandate.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Post-2002&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;Today, all transfers are completed through a court order process. As of November 11, 2008, 46 states(&lt;a href="http://fairfieldfunding.com/i/u/10030685/i/Structured_Settlement.gif" class="external text" title="http://fairfieldfunding.com/i/u/10030685/i/Structured_Settlement.gif" rel="nofollow"&gt;Map&lt;/a&gt;). have transfer laws in place regulating the transfer process. Of these, 41 are based in whole or in part on the model state law enacted by NCOIL, the National Conference of Insurance Legislators (or, in cases when the state law predates the model act, they are substantially similar).&lt;/p&gt; &lt;p&gt;Most state transfer laws contain similar provisions, as follows: (1) pre-contract disclosures to be made to the seller concerning the essentials of the transaction; (2) notice to certain interested parties; (3) an admonition to seek professional advice concerning the proposed transfer; and (4) court approval of the transfer, including a finding that it is in the best interest of seller, taking into account the welfare and support of any dependents.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Factoring Terminology&lt;/span&gt;&lt;/h2&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Best Interest Standard&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;Internal Revenue Code Sec. 5891 and most state laws require that a court find that a proposed settlement factoring transaction be in the best interest of the seller, taking into account the welfare and support of any dependents. [11] “Best interest” is generally not defined, which gives judges flexibility to make a subjective determination on a case-by-case basis. Some state laws may require that the judge look at factors such as the “purpose of the intended use of the funds,” the payee’s mental and physical capacity, and the seller’s potential need for future medical treatment. [12] [13]. One Minnesota court described the “best interest standard” as a determination involving “a global consideration of the facts, circumstances, and means of support available to the payee and his or her dependents.” [14]&lt;/p&gt; &lt;p&gt;Courts have consistently found that the “best interest standard” is not limited to financial hardship cases. [15] Hence, a transfer may be in a seller’s best interest because it allows him to take advantage of an opportunity (i.e., buy a new home, start a business, attend college, etc.) or to avoid disaster (i.e., pay for a family member’s unexpected medical care, pay off mounting debt, etc.). For example, a New Jersey court found that a transaction was in a seller’s best interest where the funds were used to “pay off bills…and to buy a home and get married.” [16]&lt;/p&gt; &lt;p&gt;Although sometimes criticized for being vague, the best interest standard’s lack of precise definition allows considerable latitude in judicial review. Courts can consider on a case-by-case basis the totality of the circumstances surrounding the transfer to determine whether it should be approved.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Discount Rate&lt;/span&gt;&lt;/h3&gt;In the beginning, the factoring industry had some relatively high discount rates due to heavy expenses caused by costly litigation battles and limited access to traditional investors. However, once state and federal legislation was enacted, the industry’s interest rates decreased dramatically. There is much confusion with the terminology “discount rate” because the term is used in different ways. The discount rate referred to in a factoring transaction is similar to an interest rate associated with home loans, credit cards and car loans where the interest rate is applied to the payment stream itself. In a factoring transaction, the factoring company knows the payment stream they are going to purchase and applies an interest rate to the payment stream itself and solves for the funding amount, as though it was a loan. Discount rates from factoring companies to consumers can range anywhere between under 8% up to over 18% but usually average somewhere in the middle (link to a discount rate calculator can be found &lt;a href="http://www.structuredsettlement-quotes.com/fun/dr/" class="external text" title="http://www.structuredsettlement-quotes.com/fun/dr/" rel="nofollow"&gt;here&lt;/a&gt;). Factoring discount rates can be a bit higher when compared to home loan interest rates, due to the fact the factoring transactions are more of a boutique product for investors opposed to the mainstream collateralized mortgage transactions. One common mistake in calculating the discount rate is to use “elementary school math” where you take the funding/loan amount and divide it by the total price of all the payments being purchased. Because this method disregards the concept of time (and the time value of money), the resulting percentage is useless. For example, the court in In Re Henderson Receivables Origination v. Campos noted an annual discount rate of 16.8% where the annuitant received $36,500 for the assignment of payments totaling $63,364.94 over 84 months (two monthly payments of $672.32 each, beginning September 30, 2006 and ending on October 31, 2006; eighty-two monthly payments of $692.49 each, increasing 3% every twelve months, beginning on November 30, 2006 and ending on August 31, 2013). However, had the court in Henderson Receivables Origination applied the illogical formula of discounting from “elementary school math” ($36,500/ $63,364.94), the discount rate would have been an astronomical (and nonsensical) 61%. [17]&lt;h3&gt;&lt;span class="mw-headline"&gt;Discounted Present Value&lt;/span&gt;&lt;/h3&gt;Another term commonly used in factoring transactions is “discounted present value,” which is defined in the &lt;a href="http://www.legis.state.wi.us/assembly/asm97/news/insurance/Model%20Laws%20and%20Resolutions/Workers%20Compensation%20Insurance%20Committee/StructuredSettlementsModel.pdf" class="external text" title="http://www.legis.state.wi.us/assembly/asm97/news/insurance/Model%20Laws%20and%20Resolutions/Workers%20Compensation%20Insurance%20Committee/StructuredSettlementsModel.pdf" rel="nofollow"&gt;NCOIL model transfer act&lt;/a&gt; as “the present value of future payments determined by discounting such payments to the present using the most recently published Applicable Federal Rate for determining the present value of an annuity, as issued by the United States Internal Revenue Service.” [18] The IRS discount rate, also known as the Applicable Federal Rate (AFR), is used to determine the charitable deduction for many types of planned gifts, such as charitable remainder trusts and gift annuities. The rate is the annual rate of return that the IRS assumes the gift assets will earn during the gift term. The IRS discount rate is published monthly (link to current rate may be found &lt;a href="http://www.pmstax.com/afr/cur7520.shtml" class="external text" title="http://www.pmstax.com/afr/cur7520.shtml" rel="nofollow"&gt;here&lt;/a&gt;). In Henderson Receivables Origination (above), the court calculated the discounted present value of the $63,364.94 to be transferred as $50,933.18 based on the applicable federal rate of 6.00%. [18] The “discounted present value” is a measuring stick for determining what the value of a future payment (i.e., a payment that is due in the year 2057) is today. Hence, the discounted present value of a payment corrects for inflation and the principle that money available today is worth more than money not accessible for 50 years (or some future time). However, the discounted present value is not the same thing as market value (what someone is willing to pay). Basically, a calculation that discounts a future payment based on IRS rates is an artificial number since it has no bearing on the payment’s actual selling price. For example, in Henderson Receivables Origination, it is somewhat confusing for the court to evaluate future payments totaling $63,364,94 based the discounted present value of $50,933.18 because that is not the market value of the payments. In other words, the annuitant couldn’t go out and get $50,933.18 for his future payments because no person or company would be willing to pay that much. Some states will require a quotient to be listed on the disclosure that is sent to the customer prior to entering into a contract with a factoring company. The quotient is calculated by dividing the purchase price by the discounted present value. The quotient (like the discounted present value) provides no relevance in the pricing of a settlement factoring transaction. In Henderson Receivables Origination (above), the court did consider this quotient which was calculated as 71.70% ($36,500/ $50,933.18). [19]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3783529254785379116?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3783529254785379116/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3783529254785379116' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3783529254785379116'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3783529254785379116'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/structured-settlement-factoring.html' title='Structured settlement factoring'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3924960872771141818</id><published>2009-02-01T12:34:00.000+05:00</published><updated>2009-02-01T12:35:16.296+05:00</updated><title type='text'>Structured sale</title><content type='html'>&lt;div class="post-body entry-content"&gt; &lt;p&gt;A &lt;b&gt;structured sale&lt;/b&gt; is a special type of &lt;a href="http://en.wikipedia.org/wiki/Installment_sale" title="Installment sale"&gt;installment sale&lt;/a&gt; pursuant to the &lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;Internal Revenue Code&lt;/a&gt;.&lt;sup id="cite_ref-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Structured_sale#cite_note-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Installment sales permit sellers to defer recognition of gains on the sale of a business or real estate to the tax year in which the related sale proceeds are received. Structured sales allow the seller of an asset to pay taxes over time while having the payments guaranteed by a high credit quality alternate obligor, who accepts assignment of the buyers periodic payment obligation. Transactions can currently be done as small as $100,000.&lt;/p&gt; &lt;p&gt;In a structured sale, rather than the buyer paying the installments, the buyer pays cash, some of which is used as consideration for a third party assignment company to accept the payment obligation. The assignment company then purchases an &lt;a href="http://en.wikipedia.org/wiki/Annuity_%28financial_contracts%29" title="Annuity (financial contracts)"&gt;annuity&lt;/a&gt; from a &lt;a href="http://en.wikipedia.org/wiki/Life_insurance" title="Life insurance"&gt;life insurance&lt;/a&gt; company with high financial ratings from &lt;a href="http://en.wikipedia.org/wiki/A._M._Best" title="A. M. Best"&gt;A. M. Best&lt;/a&gt;. Case law and administrative precedents support recognition of the original contract terms after a substitution of obligors.&lt;sup id="cite_ref-1" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Structured_sale#cite_note-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; In addition, a properly handled transaction will avoid issues with constructive receipt and economic benefit.&lt;/p&gt; &lt;p&gt;While negotiating the installment payments, the seller is free to design payment streams with a great deal of flexibility. Each installment payment to the seller has three components: deferred return of basis, deferred capital gain, and ordinary income earned on the money in the annuity. Under the doctrine of constructive receipt, with a properly documented structured sale, no taxable event is recognized unless a payment is actually received. Taxation is the same as if the buyer were making installment payments directly.&lt;/p&gt; &lt;p&gt;Structured sales are an alternative to a section &lt;a href="http://en.wikipedia.org/wiki/1031_exchange" title="1031 exchange" class="mw-redirect"&gt;1031 exchange&lt;/a&gt;, which defers recognition of capital gain, but forces the seller to continue holding some form of property. Structured sales work well for sellers who want to create a continuing stream of income without management worries. Retiring business owners and downsizing homeowners are examples of sellers who can benefit.&lt;/p&gt; &lt;p&gt;The structured sale must be documented, and money must be handled in such a way that the ultimate recipient is not treated as having constructive received the payment prior to the time it is actually paid. For the buyer, there is no difference from a traditional cash-and-title-now deal, except for additional paperwork. Because of tax advantages to the seller, structuring the sale might, however, make the buyer's offer more attractive. Because the buyer has paid in full, the buyer gets full title at time of closing.&lt;/p&gt; &lt;p&gt;There are no direct fees to the buyer or seller to employ the structured sale strategy. The structured settlement specialist who implements the transaction is paid directly by the life insurance company that writes the annuity.&lt;/p&gt; &lt;p&gt;The internal &lt;a href="http://en.wikipedia.org/wiki/Rate_of_return" title="Rate of return"&gt;rate of return&lt;/a&gt; is comparable to long term high quality debt instruments.&lt;/p&gt; &lt;p&gt;&lt;a href="http://en.wikipedia.org/wiki/Allstate" title="Allstate"&gt;Allstate&lt;/a&gt; Life was the originator of the structured sale concept and until recently was the only structured settlement annuity company whose product was available for the structured sale transaction. &lt;a href="http://en.wikipedia.org/wiki/Prudential" title="Prudential"&gt;Prudential&lt;/a&gt; has begun to use its non-qualified assignment product on a limited basis.&lt;/p&gt;  &lt;/div&gt;   &lt;span class="post-author vcard"&gt; &lt;/span&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3924960872771141818?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3924960872771141818/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3924960872771141818' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3924960872771141818'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3924960872771141818'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/structured-sale.html' title='Structured sale'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8716790207078181537</id><published>2009-02-01T12:31:00.000+05:00</published><updated>2009-02-01T12:34:37.470+05:00</updated><title type='text'>Mesothelioma Applied Research Foundation</title><content type='html'>&lt;p&gt;The &lt;b&gt;Mesothelioma Applied Research Foundation&lt;/b&gt; (Meso Foundation, formerly MARF) is a &lt;a href="http://en.wikipedia.org/wiki/Non-profit_organization" title="Non-profit organization"&gt;non-profit organization&lt;/a&gt; that funds &lt;a href="http://en.wikipedia.org/wiki/Mesothelioma" title="Mesothelioma"&gt;mesothelioma&lt;/a&gt; research, provides services to patients, educates the public, and advocates in Washington, DC for governmental funding for mesothelioma research. The organization's mission is to eradicate mesothelioma as a life-ending disease.&lt;/p&gt; &lt;p&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma" title="Mesothelioma"&gt;Mesothelioma&lt;/a&gt; is a cancer caused by exposure to &lt;a href="http://en.wikipedia.org/wiki/Asbestos" title="Asbestos"&gt;asbestos&lt;/a&gt;.&lt;/p&gt; &lt;p&gt;To date, the Foundation has funded over $5 million in &lt;a href="http://en.wikipedia.org/wiki/Clinical_research" title="Clinical research"&gt;clinical research&lt;/a&gt; and is the host of the annual &lt;i&gt;International Symposium on Malignant Mesothelioma&lt;/i&gt;.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8716790207078181537?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8716790207078181537/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8716790207078181537' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8716790207078181537'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8716790207078181537'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/mesothelioma-applied-research.html' title='Mesothelioma Applied Research Foundation'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4150075352408233156</id><published>2009-02-01T12:30:00.000+05:00</published><updated>2009-02-01T12:31:32.181+05:00</updated><title type='text'>Chloracne</title><content type='html'>&lt;p&gt;&lt;b&gt;Chloracne&lt;/b&gt; is an &lt;a href="http://en.wikipedia.org/wiki/Acne_vulgaris" title="Acne vulgaris"&gt;acne&lt;/a&gt;-like eruption of &lt;a href="http://en.wikipedia.org/wiki/Blackhead" title="Blackhead"&gt;blackheads&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Cyst" title="Cyst"&gt;cysts&lt;/a&gt;, and &lt;a href="http://en.wikipedia.org/wiki/Pustule" title="Pustule"&gt;pustules&lt;/a&gt; associated with over-exposure to certain &lt;a href="http://en.wikipedia.org/wiki/Halogen" title="Halogen"&gt;halogenated&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Aromatic_compound" title="Aromatic compound" class="mw-redirect"&gt;aromatic compounds&lt;/a&gt;, such as &lt;a href="http://en.wikipedia.org/wiki/Polychlorinated_dibenzodioxins" title="Polychlorinated dibenzodioxins"&gt;chlorinated dioxins&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Dibenzofuran" title="Dibenzofuran"&gt;dibenzofurans&lt;/a&gt;. The lesions are most frequently found on the cheeks, behind the ears, in the armpits and groin region.&lt;/p&gt; &lt;p&gt;The condition was first described in German industrial workers in 1897 by Von Bettman, and was initially believed to be caused by exposure to toxic &lt;a href="http://en.wikipedia.org/wiki/Chlorine" title="Chlorine"&gt;chlorine&lt;/a&gt; (hence the name "chloracne"). It was only in the mid-1950s that chloracne was associated with aromatic hydrocarbons&lt;sup id="cite_ref-ref1_0-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-ref1-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;. The substances that may cause chloracne are now collectively known as &lt;b&gt;chloracnegens&lt;/b&gt;.&lt;/p&gt; &lt;p&gt;Chloracne is particularly linked to toxic exposure to &lt;a href="http://en.wikipedia.org/wiki/Polychlorinated_dibenzodioxins" title="Polychlorinated dibenzodioxins"&gt;dioxins&lt;/a&gt; (byproducts of many &lt;a href="http://en.wikipedia.org/wiki/Chemical_process" title="Chemical process"&gt;chemical processes&lt;/a&gt;, including the manufacture of &lt;a href="http://en.wikipedia.org/wiki/Herbicides" title="Herbicides" class="mw-redirect"&gt;herbicides&lt;/a&gt; such as &lt;a href="http://en.wikipedia.org/wiki/Agent_Orange" title="Agent Orange"&gt;Agent Orange&lt;/a&gt;) — so much so that it is considered a clinical sign of dioxin exposure. The severity and onset of chloracne may follow a typical &lt;a href="http://en.wikipedia.org/wiki/Asymptote" title="Asymptote"&gt;asymptotic&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Dose-response_relationship" title="Dose-response relationship"&gt;dose-response relationship&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Curve" title="Curve"&gt;curve&lt;/a&gt;.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Etiology and progression&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;Chloracne normally results from direct skin contact with chloracnegens, although ingestion and inhalation are also possible causative routes.&lt;/p&gt; &lt;p&gt;Chloracnegens are fat-soluble, meaning they persist in the body fat for a very long period following exposure. Chloracne is a chronic &lt;a href="http://en.wikipedia.org/wiki/Inflammation" title="Inflammation"&gt;inflammatory&lt;/a&gt; condition that results from this persistence, in combination with the toxin's chemical properties. It is believed, at least from &lt;a href="http://en.wikipedia.org/wiki/Rodent" title="Rodent"&gt;rodent&lt;/a&gt; models, that the toxin activates a series of &lt;a href="http://en.wikipedia.org/wiki/Receptor_%28biochemistry%29" title="Receptor (biochemistry)"&gt;receptors&lt;/a&gt; promoting &lt;a href="http://en.wikipedia.org/wiki/Macrophage" title="Macrophage"&gt;macrophage&lt;/a&gt; proliferation, inducing &lt;a href="http://en.wikipedia.org/wiki/Neutrophilia" title="Neutrophilia"&gt;neutrophilia&lt;/a&gt; and leading to a generalised inflammatory response in the skin. This process may also be augmented by induction of excess &lt;a href="http://en.wikipedia.org/wiki/Tumor_necrosis_factors" title="Tumor necrosis factors"&gt;tumor necrosis factor&lt;/a&gt; in the blood &lt;a href="http://en.wikipedia.org/wiki/Blood_plasma" title="Blood plasma"&gt;serum&lt;/a&gt;.&lt;/p&gt; &lt;p&gt;The inflammatory processes lead to the formation of &lt;a href="http://en.wikipedia.org/wiki/Keratin" title="Keratin"&gt;keratinous&lt;/a&gt; plugs in skin pores, forming yellowish cysts and dark pustules. The associated &lt;a href="http://en.wikipedia.org/wiki/Pus" title="Pus"&gt;pus&lt;/a&gt; is usually &lt;a href="http://en.wikipedia.org/wiki/Tennis_ball" title="Tennis ball"&gt;tennis ball&lt;/a&gt; colored. The skin lesions occur mainly in the face, but in more severe cases they involve the shoulders and chest, the back, and the abdomen. In advanced cases, the lesions appear also on the arms, thighs, legs, hands and feet.&lt;/p&gt; &lt;p&gt;In some instances, chloracne may not appear for three to four weeks after toxic exposure; however in other cases — particularly in events of massive exposure — the symptoms may appear within days.&lt;sup id="cite_ref-ref1_0-1" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-ref1-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;sup id="cite_ref-ref2_1-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-ref2-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Treatment&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;Once chloracne has been identified, the primary action is to remove the patient and all other individuals from the source of contamination. Further treatment is &lt;a href="http://en.wikipedia.org/wiki/Symptomatic" title="Symptomatic" class="mw-redirect"&gt;symptomatic&lt;/a&gt;.&lt;/p&gt; &lt;p&gt;Severe or persistent lesions may be treated with oral &lt;a href="http://en.wikipedia.org/wiki/Antibiotics" title="Antibiotics" class="mw-redirect"&gt;antibiotics&lt;/a&gt; or &lt;a href="http://en.wikipedia.org/wiki/Isotretinoin" title="Isotretinoin"&gt;isotretinoin&lt;/a&gt;. However, chloracne may be highly resistant to any treatment.&lt;/p&gt; &lt;p&gt;The course of the disease is highly variable. In some cases the lesions may resolve within two years or so; however, in other cases the lesions may be effectively permanent (mean duration of lesions in one 1984 study was 26 years, with some workers remaining disfigured over three decades after exposure).&lt;sup id="cite_ref-ref3_2-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-ref3-2" title=""&gt;&lt;span&gt;[&lt;/span&gt;3&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/p&gt; &lt;p&gt;Recent research by groups at &lt;a href="http://en.wikipedia.org/wiki/University_of_Cincinnati" title="University of Cincinnati"&gt;University of Cincinnati&lt;/a&gt; School of Medicine in &lt;a href="http://en.wikipedia.org/wiki/Ohio" title="Ohio"&gt;Ohio&lt;/a&gt; and the &lt;a href="http://en.wikipedia.org/wiki/University_of_Western_Australia" title="University of Western Australia"&gt;University of Western Australia&lt;/a&gt; indicated that &lt;a href="http://en.wikipedia.org/wiki/Polychlorinated_biphenyl" title="Polychlorinated biphenyl"&gt;PCB&lt;/a&gt; poisoning, including chloracne symptoms, can be treated with fat substitute &lt;a href="http://en.wikipedia.org/wiki/Olestra" title="Olestra"&gt;olestra&lt;/a&gt;. &lt;sup id="cite_ref-ref4_3-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-ref4-3" title=""&gt;&lt;span&gt;[&lt;/span&gt;4&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Related conditions&lt;/span&gt;&lt;/h2&gt;Chloracne is very often seen in combination with &lt;a href="http://en.wikipedia.org/wiki/Hyperhidrosis" title="Hyperhidrosis"&gt;hyperhidrosis&lt;/a&gt; (clammy, sweaty skin) and &lt;a href="http://en.wikipedia.org/wiki/Porphyria_cutanea_tarda" title="Porphyria cutanea tarda"&gt;porphyria cutanea tarda&lt;/a&gt; (a skin condition of increased pigmentation, hair coarsening and blistering).&lt;h2&gt;&lt;span class="mw-headline"&gt;Notable cases&lt;/span&gt;&lt;/h2&gt;&lt;ul&gt;&lt;li&gt;In 1949, 226 workers became ill after a container of &lt;a href="http://en.wikipedia.org/wiki/Herbicide" title="Herbicide"&gt;herbicide&lt;/a&gt; exploded at a &lt;a href="http://en.wikipedia.org/wiki/Monsanto" title="Monsanto"&gt;Monsanto&lt;/a&gt; plant in &lt;a href="http://en.wikipedia.org/wiki/Nitro,_West_Virginia" title="Nitro, West Virginia"&gt;Nitro, West Virginia&lt;/a&gt;.&lt;sup id="cite_ref-nitro_4-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-nitro-4" title=""&gt;&lt;span&gt;[&lt;/span&gt;5&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Many were diagnosed with chloracne; a medical report at the time described "systemic intoxication in the workers involving most major organ systems." In the 1960s, the same plant manufactured &lt;a href="http://en.wikipedia.org/wiki/Agent_Orange" title="Agent Orange"&gt;Agent Orange&lt;/a&gt;.&lt;/li&gt;&lt;/ul&gt; &lt;ul&gt;&lt;li&gt;193 cases of chloracne occurred in &lt;a href="http://en.wikipedia.org/wiki/Seveso" title="Seveso"&gt;Seveso&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Italy" title="Italy"&gt;Italy&lt;/a&gt; in 1976 following an &lt;a href="http://en.wikipedia.org/wiki/Seveso_disaster" title="Seveso disaster"&gt;industrial accident&lt;/a&gt; in which up to a few kilograms of &lt;a href="http://en.wikipedia.org/wiki/Dioxin" title="Dioxin" class="mw-redirect"&gt;TCDD&lt;/a&gt; were released into the atmosphere.&lt;/li&gt;&lt;/ul&gt; &lt;ul&gt;&lt;li&gt;Almost two thousand individuals suffered chloracne, among other symptoms, after chronic exposure to cooking oils contaminated with &lt;a href="http://en.wikipedia.org/wiki/Polychlorinated_biphenyl" title="Polychlorinated biphenyl"&gt;PCBs&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/PCDF" title="PCDF" class="mw-redirect"&gt;PCDFs&lt;/a&gt; in Northern &lt;a href="http://en.wikipedia.org/wiki/Kyushu" title="Kyushu" class="mw-redirect"&gt;Kyushu&lt;/a&gt;, Japan in 1968. The syndrome came to be called &lt;i&gt;&lt;a href="http://en.wikipedia.org/wiki/Yusho_Disease" title="Yusho Disease"&gt;Yusho&lt;/a&gt;&lt;/i&gt; disease. Eleven years later, a similar case of mass contamination of cooking oil was reported in central &lt;a href="http://en.wikipedia.org/wiki/Taiwan" title="Taiwan"&gt;Taiwan&lt;/a&gt; . Over 2000 individuals were affected by what came to be called &lt;i&gt;&lt;a href="http://en.wikipedia.org/w/index.php?title=Yu-Cheng&amp;amp;action=edit&amp;amp;redlink=1" class="new" title="Yu-Cheng (page does not exist)"&gt;Yu-Cheng&lt;/a&gt;&lt;/i&gt; in 1979.&lt;sup id="cite_ref-5" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Chloracne#cite_note-5" title=""&gt;&lt;span&gt;[&lt;/span&gt;6&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/li&gt;&lt;/ul&gt; &lt;ul&gt;&lt;li&gt;Ukrainian President &lt;a href="http://en.wikipedia.org/wiki/Viktor_Yushchenko" title="Viktor Yushchenko"&gt;Viktor Yushchenko&lt;/a&gt; suffered from extremely prominent facial chloracne after being diagnosed with dioxin &lt;a href="http://en.wikipedia.org/wiki/Poison" title="Poison"&gt;poisoning&lt;/a&gt; in late 2004. His diagnosis of chloracne was put forth by prominent toxicologist &lt;a href="http://en.wikipedia.org/wiki/John_Henry_%28toxicologist%29" title="John Henry (toxicologist)"&gt;John Henry&lt;/a&gt;.&lt;/li&gt;&lt;/ul&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4150075352408233156?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4150075352408233156/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4150075352408233156' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4150075352408233156'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4150075352408233156'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/chloracne.html' title='Chloracne'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-6150543562697104450</id><published>2009-02-01T12:29:00.000+05:00</published><updated>2009-02-01T12:30:22.992+05:00</updated><title type='text'>Structured Settlement</title><content type='html'>A &lt;b&gt;structured settlement&lt;/b&gt; is a financial or &lt;a href="http://en.wikipedia.org/wiki/Insurance" title="Insurance"&gt;insurance&lt;/a&gt; arrangement, including periodic payments, that a claimant accepts to resolve a personal injury &lt;a href="http://en.wikipedia.org/wiki/Tort" title="Tort"&gt;tort&lt;/a&gt; claim or to compromise a statutory periodic payment obligation. Structured settlements were first utilized in Canada and the United States during the 1970s as an alternative to &lt;a href="http://en.wikipedia.org/wiki/Lump_sum" title="Lump sum"&gt;lump sum&lt;/a&gt; settlements. Structured settlements are now part of the statutory tort law of several &lt;a href="http://en.wikipedia.org/wiki/Common_law" title="Common law"&gt;common law&lt;/a&gt; countries including Australia, Canada, England and the United States. Although some uniformity exists, each of these countries has its own definitions, rules and standards for structured settlements. Structured settlements may include income tax and spendthrift requirements as well as benefits. Structured settlement payments are sometimes called “periodic payments.” A structured settlement incorporated into a trial judgment is called a “periodic payment judgment."&lt;h2&gt;&lt;span class="mw-headline"&gt;Structured Settlements in the United States&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;The United States has enacted structured settlement laws and regulations at both the federal and state levels. Federal structured settlement laws include sections of the (federal) &lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;Internal Revenue Code&lt;/a&gt;&lt;sup id="cite_ref-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Structured_settlement#cite_note-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;. State structured settlement laws include structured settlement protection statutes and periodic payment of judgment statutes. &lt;a href="http://en.wikipedia.org/wiki/Medicaid" title="Medicaid"&gt;Medicaid&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Medicare_%28United_States%29" title="Medicare (United States)"&gt;Medicare&lt;/a&gt; laws and regulations affect structured settlements. To preserve a claimant’s Medicare and Medicaid benefits, structured settlement payments may be incorporated into “Medicare Set Aside Arrangements” “Special Needs Trusts."&lt;/p&gt; &lt;p&gt;Structured settlements have been endorsed by many of the nation's largest disability rights organizations, including the American Association of People with Disabilities &lt;sup id="cite_ref-1" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Structured_settlement#cite_note-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; and the National Organization on Disability &lt;sup id="cite_ref-2" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Structured_settlement#cite_note-2" title=""&gt;&lt;span&gt;[&lt;/span&gt;3&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Definitions&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;The United States definition of “structured settlement” for federal income taxation purposes, found in Internal Revenue Code Section 5891(c)(1) (&lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;26 U.S.C.&lt;/a&gt; &lt;a href="http://www.law.cornell.edu/uscode/26/5891%28c%29%281%29.html" class="external text" title="http://www.law.cornell.edu/uscode/26/5891(c)(1).html" rel="nofollow"&gt;§ 5891(c)(1)&lt;/a&gt;), is an "arrangement" that meets the following requirements:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;A structured settlement must be established by: &lt;ul&gt;&lt;li&gt;A suit or agreement for periodic payment of damages excludable from gross income under Internal Revenue Code Section 104(a)(2) (&lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;26 U.S.C.&lt;/a&gt; &lt;a href="http://www.law.cornell.edu/uscode/26/104%28a%29%282%29.html" class="external text" title="http://www.law.cornell.edu/uscode/26/104(a)(2).html" rel="nofollow"&gt;§ 104(a)(2)&lt;/a&gt;); or&lt;/li&gt;&lt;li&gt;An agreement for the periodic payment of compensation under any workers’ compensation law excludable under Internal Revenue Code Section 104(a)(1) (&lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;26 U.S.C.&lt;/a&gt; &lt;a href="http://www.law.cornell.edu/uscode/26/104%28a%29%281%29.html" class="external text" title="http://www.law.cornell.edu/uscode/26/104(a)(1).html" rel="nofollow"&gt;§ 104(a)(1)&lt;/a&gt;); and&lt;/li&gt;&lt;/ul&gt; &lt;/li&gt;&lt;li&gt;The periodic payments must be of the character described in subparagraphs (A) and (B) of Internal Revenue Code Section 130(c)(2) (&lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;26 U.S.C.&lt;/a&gt; &lt;a href="http://www.law.cornell.edu/uscode/26/130%28c%29%282%29%29.html" class="external text" title="http://www.law.cornell.edu/uscode/26/130(c)(2)).html" rel="nofollow"&gt;§ 130(c)(2))&lt;/a&gt;) and must be payable by a person who: &lt;ul&gt;&lt;li&gt;Is a party to the suit or agreement or to a workers' compensation claim; or&lt;/li&gt;&lt;li&gt;By a person who has assumed the liability for such periodic payments under a qualified assignment in accordance with Internal Revenue Code Section 130 (&lt;a href="http://en.wikipedia.org/wiki/Internal_Revenue_Code" title="Internal Revenue Code"&gt;26 U.S.C.&lt;/a&gt; &lt;a href="http://www.law.cornell.edu/uscode/26/130.html" class="external text" title="http://www.law.cornell.edu/uscode/26/130.html" rel="nofollow"&gt;§ 130&lt;/a&gt;).&lt;/li&gt;&lt;/ul&gt; &lt;/li&gt;&lt;/ul&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Legal Structure&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;The typical structured settlement arises and is structured as follows: An injured party (the claimant) settles a &lt;a href="http://en.wikipedia.org/wiki/Tort" title="Tort"&gt;tort&lt;/a&gt; suit with the defendant (or its insurance carrier) pursuant to a settlement agreement that provides that, in exchange for the claimant's securing the dismissal of the lawsuit, the defendant (or, more commonly, its insurer) agrees to make a series of periodic payments over time. The insurer, a property/casualty insurance company, thus finds itself with a long-term payment obligation to the claimant. To fund this obligation, the property/casualty insurer generally takes one of two typical approaches: It either purchases an &lt;a href="http://en.wikipedia.org/wiki/Annuity" title="Annuity"&gt;annuity&lt;/a&gt; from a life insurance company (an arrangement called a "buy and hold" case) or it assigns (or, more properly, delegates) its periodic payment obligation to a third party which in turn purchases an annuity (which arrangement is called an "assigned case").&lt;/p&gt; &lt;p&gt;In an unassigned case, the property/casualty insurer retains the periodic payment obligation and funds it by purchasing an annuity from a life insurance company, thereby offsetting its obligation with a matching asset. The payment stream purchased under the annuity matches exactly, in timing and amounts, the periodic payments agreed to in the settlement agreement. The property/casualty company owns the annuity and names the claimant as the payee under the annuity, thereby directing the annuity issuer to send payments directly to the claimant. If any of the periodic payments are life-contingent (i.e., the obligation to make a payment is contingent on someone continuing to be alive), then the claimant (or whoever is determined to be the measuring life) is named as the annuitant or measuring life under the annuity.&lt;/p&gt; &lt;p&gt;In an assigned case, the property/casualty company does not wish to retain the long-term periodic payment obligation on its books. Accordingly, the property/casualty insurer transfers the obligation, through a legal device called a qualified assignment, to a third party. The third party, called an assignment company, will require the property/casualty company to pay it an amount sufficient to enable it to buy an annuity that will fund its newly accepted periodic payment obligation. If the claimant consents to the transfer of the periodic payment obligation (either in the settlement agreement or, failing that, in a special form of qualified assignment known as a qualified assignment and release), the defendant and/or its property/casualty company has no further liability to make the periodic payments. This method of substituting the obligor is desirable for property/casualty companies that do not want to retain the periodic payment obligation on their books. Typically, an assignment company is an affiliate of the life insurance company from which the annuity is purchased.&lt;/p&gt; &lt;p&gt;An assignment is said to be "qualified" if it satisfies the criteria set forth in Internal Revenue Code Section 130 &lt;a href="http://www.law.cornell.edu/uscode/html/uscode26/usc_sec_26_00000130----000-.html" class="external autonumber" title="http://www.law.cornell.edu/uscode/html/uscode26/usc_sec_26_00000130----000-.html" rel="nofollow"&gt;[1]&lt;/a&gt;. Qualification of the assignment is important to assignment companies because without it the amount they receive to induce them to accept periodic payment obligations would be considered income for federal income tax purposes. If an assignment qualifies under Section 130, however, the amount received is excluded from the income of the assignment company. This provision of the tax code was enacted to encourage assigned cases; without it, assignment companies would owe federal income taxes but would typically have no source from which to make the payments.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-6150543562697104450?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/6150543562697104450/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=6150543562697104450' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6150543562697104450'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6150543562697104450'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/structured-settlement.html' title='Structured Settlement'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-2788929249409503925</id><published>2009-02-01T12:27:00.000+05:00</published><updated>2009-02-01T12:29:02.184+05:00</updated><title type='text'>Mesothelioma</title><content type='html'>&lt;p&gt;&lt;b&gt;Mesothelioma&lt;/b&gt; is a form of &lt;a href="http://en.wikipedia.org/wiki/Cancer" title="Cancer"&gt;cancer&lt;/a&gt; that is almost always caused by previous exposure to &lt;a href="http://en.wikipedia.org/wiki/Asbestos" title="Asbestos"&gt;asbestos&lt;/a&gt;. In this disease, &lt;a href="http://en.wikipedia.org/wiki/Malignant" title="Malignant"&gt;malignant&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Cell_%28biology%29" title="Cell (biology)"&gt;cells&lt;/a&gt; develop in the &lt;a href="http://en.wikipedia.org/wiki/Mesothelium" title="Mesothelium"&gt;mesothelium&lt;/a&gt;, a protective lining that covers most of the body's internal organs. Its most common site is the &lt;a href="http://en.wikipedia.org/wiki/Pleura" title="Pleura" class="mw-redirect"&gt;pleura&lt;/a&gt; (outer lining of the &lt;a href="http://en.wikipedia.org/wiki/Lung" title="Lung"&gt;lungs&lt;/a&gt; and internal chest wall), but it may also occur in the &lt;a href="http://en.wikipedia.org/wiki/Peritoneum" title="Peritoneum"&gt;peritoneum&lt;/a&gt; (the lining of the abdominal cavity), the heart,&lt;sup id="cite_ref-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-0" title=""&gt;&lt;span&gt;[&lt;/span&gt;1&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; the &lt;a href="http://en.wikipedia.org/wiki/Pericardium" title="Pericardium"&gt;pericardium&lt;/a&gt; (a sac that surrounds the &lt;a href="http://en.wikipedia.org/wiki/Heart" title="Heart"&gt;heart&lt;/a&gt;) or &lt;a href="http://en.wikipedia.org/wiki/Tunica_vaginalis" title="Tunica vaginalis"&gt;tunica vaginalis&lt;/a&gt;.&lt;/p&gt; &lt;p&gt;Most people who develop mesothelioma have worked on jobs where they inhaled asbestos particles, or they have been exposed to asbestos dust and fiber in other ways. Washing the clothes of a family member who worked with asbestos can also put a person at risk for developing mesothelioma.&lt;sup id="cite_ref-1" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-1" title=""&gt;&lt;span&gt;[&lt;/span&gt;2&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Unlike lung cancer, there is no association between mesothelioma and &lt;a href="http://en.wikipedia.org/wiki/Smoking" title="Smoking"&gt;smoking&lt;/a&gt;.&lt;sup id="cite_ref-muscat_2-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-muscat-2" title=""&gt;&lt;span&gt;[&lt;/span&gt;3&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Compensation via asbestos funds or lawsuits is an important issue in mesothelioma (see &lt;a href="http://en.wikipedia.org/wiki/Asbestos_and_the_law" title="Asbestos and the law"&gt;asbestos and the law&lt;/a&gt;).&lt;/p&gt; &lt;p&gt;The symptoms of mesothelioma include &lt;a href="http://en.wikipedia.org/wiki/Shortness_of_breath" title="Shortness of breath" class="mw-redirect"&gt;shortness of breath&lt;/a&gt; due to &lt;a href="http://en.wikipedia.org/wiki/Pleural_effusion" title="Pleural effusion"&gt;pleural effusion&lt;/a&gt; (fluid between the lung and the &lt;a href="http://en.wikipedia.org/wiki/Chest_wall" title="Chest wall" class="mw-redirect"&gt;chest wall&lt;/a&gt;) or chest wall &lt;a href="http://en.wikipedia.org/wiki/Pain" title="Pain"&gt;pain&lt;/a&gt;, and general symptoms such as &lt;a href="http://en.wikipedia.org/wiki/Weight_loss" title="Weight loss"&gt;weight loss&lt;/a&gt;. The diagnosis may be suspected with &lt;a href="http://en.wikipedia.org/wiki/Chest_X-ray" title="Chest X-ray"&gt;chest X-ray&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/CT_scan" title="CT scan" class="mw-redirect"&gt;CT scan&lt;/a&gt;, and is confirmed with a &lt;a href="http://en.wikipedia.org/wiki/Biopsy" title="Biopsy"&gt;biopsy&lt;/a&gt; (tissue sample) and &lt;a href="http://en.wikipedia.org/wiki/Histopathology" title="Histopathology"&gt;microscopic&lt;/a&gt; examination. A &lt;a href="http://en.wikipedia.org/wiki/Thoracoscopy" title="Thoracoscopy"&gt;thoracoscopy&lt;/a&gt; (inserting a tube with a camera into the chest) can be used to take biopsies. It allows the introduction of substances such as &lt;a href="http://en.wikipedia.org/wiki/Talc" title="Talc"&gt;talc&lt;/a&gt; to obliterate the pleural space (called &lt;a href="http://en.wikipedia.org/wiki/Pleurodesis" title="Pleurodesis"&gt;pleurodesis&lt;/a&gt;), which prevents more fluid from accumulating and pressing on the lung. Despite treatment with &lt;a href="http://en.wikipedia.org/wiki/Chemotherapy" title="Chemotherapy"&gt;chemotherapy&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Radiation_therapy" title="Radiation therapy"&gt;radiation therapy&lt;/a&gt; or sometimes &lt;a href="http://en.wikipedia.org/wiki/Surgery" title="Surgery"&gt;surgery&lt;/a&gt;, the disease carries a poor &lt;a href="http://en.wikipedia.org/wiki/Prognosis" title="Prognosis"&gt;prognosis&lt;/a&gt;. Research about &lt;a href="http://en.wikipedia.org/wiki/Screening_test" title="Screening test" class="mw-redirect"&gt;screening tests&lt;/a&gt; for the early detection of mesothelioma is ongoing.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Signs and symptoms&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;Symptoms of mesothelioma may not appear until 20 to 50 years after exposure to asbestos. Shortness of breath, cough, and pain in the chest due to an accumulation of fluid in the pleural space are often symptoms of pleural mesothelioma.&lt;/p&gt; &lt;p&gt;Symptoms of &lt;a href="http://en.wikipedia.org/wiki/Peritoneum" title="Peritoneum"&gt;peritoneal&lt;/a&gt; mesothelioma include weight loss and &lt;a href="http://en.wikipedia.org/wiki/Cachexia" title="Cachexia"&gt;cachexia&lt;/a&gt;, abdominal swelling and pain due to &lt;a href="http://en.wikipedia.org/wiki/Ascites" title="Ascites"&gt;ascites&lt;/a&gt; (a buildup of fluid in the abdominal cavity). Other symptoms of peritoneal mesothelioma may include bowel obstruction, blood clotting abnormalities, &lt;a href="http://en.wikipedia.org/wiki/Anemia" title="Anemia"&gt;anemia&lt;/a&gt;, and &lt;a href="http://en.wikipedia.org/wiki/Fever" title="Fever"&gt;fever&lt;/a&gt;. If the cancer has spread beyond the mesothelium to other parts of the body, symptoms may include pain, trouble swallowing, or swelling of the neck or face.&lt;/p&gt; &lt;p&gt;These symptoms may be caused by mesothelioma or by other, less serious conditions.&lt;/p&gt; &lt;p&gt;Mesothelioma that affects the pleura can cause these signs and symptoms:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;chest wall pain&lt;/li&gt;&lt;li&gt;pleural effusion, or fluid surrounding the lung&lt;/li&gt;&lt;li&gt;shortness of breath&lt;/li&gt;&lt;li&gt;fatigue or anemia&lt;/li&gt;&lt;li&gt;wheezing, hoarseness, or cough&lt;/li&gt;&lt;li&gt;blood in the &lt;a href="http://en.wikipedia.org/wiki/Sputum" title="Sputum"&gt;sputum&lt;/a&gt; (fluid) coughed up (&lt;a href="http://en.wikipedia.org/wiki/Hemoptysis" title="Hemoptysis"&gt;hemoptysis&lt;/a&gt;)&lt;/li&gt;&lt;/ul&gt; &lt;p&gt;In severe cases, the person may have many &lt;a href="http://en.wikipedia.org/wiki/Tumor" title="Tumor"&gt;tumor&lt;/a&gt; masses. The individual may develop a &lt;a href="http://en.wikipedia.org/wiki/Pneumothorax" title="Pneumothorax"&gt;pneumothorax&lt;/a&gt;, or collapse of the &lt;a href="http://en.wikipedia.org/wiki/Lung" title="Lung"&gt;lung&lt;/a&gt;. The disease may &lt;a href="http://en.wikipedia.org/wiki/Metastasize" title="Metastasize" class="mw-redirect"&gt;metastasize&lt;/a&gt;, or spread, to other parts of the body.&lt;/p&gt; &lt;p&gt;Tumors that affect the abdominal cavity often do not cause symptoms until they are at a late stage. Symptoms include:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;abdominal pain&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Ascites" title="Ascites"&gt;ascites&lt;/a&gt;, or an abnormal buildup of fluid in the abdomen&lt;/li&gt;&lt;li&gt;a mass in the abdomen&lt;/li&gt;&lt;li&gt;problems with bowel function&lt;/li&gt;&lt;li&gt;weight loss&lt;/li&gt;&lt;/ul&gt; &lt;p&gt;In severe cases of the disease, the following signs and symptoms may be present:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;blood clots in the veins, which may cause &lt;a href="http://en.wikipedia.org/wiki/Thrombophlebitis" title="Thrombophlebitis"&gt;thrombophlebitis&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Disseminated_intravascular_coagulation" title="Disseminated intravascular coagulation"&gt;disseminated intravascular coagulation&lt;/a&gt;, a disorder causing severe bleeding in many body organs&lt;/li&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Jaundice" title="Jaundice"&gt;jaundice&lt;/a&gt;, or yellowing of the eyes and skin&lt;/li&gt;&lt;li&gt;low blood sugar level&lt;/li&gt;&lt;li&gt;pleural effusion&lt;/li&gt;&lt;li&gt;pulmonary emboli, or blood clots in the arteries of the lungs&lt;/li&gt;&lt;li&gt;severe ascites&lt;/li&gt;&lt;/ul&gt; &lt;p&gt;A mesothelioma does not usually spread to the bone, brain, or adrenal glands. Pleural tumors are usually found only on one side of the lungs.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Diagnosis&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;Diagnosing mesothelioma is often difficult, because the symptoms are similar to those of a number of other conditions. Diagnosis begins with a review of the patient's medical history. A history of exposure to asbestos may increase clinical suspicion for mesothelioma. A physical examination is performed, followed by &lt;a href="http://en.wikipedia.org/wiki/Chest_X-ray" title="Chest X-ray"&gt;chest X-ray&lt;/a&gt; and often &lt;a href="http://en.wikipedia.org/wiki/Spirometry" title="Spirometry"&gt;lung function tests&lt;/a&gt;. The X-ray may reveal pleural thickening commonly seen after asbestos exposure and increases suspicion of mesothelioma. A &lt;a href="http://en.wikipedia.org/wiki/Computed_tomography" title="Computed tomography"&gt;CT&lt;/a&gt; (or CAT) scan or an MRI is usually performed. If a large amount of fluid is present, abnormal cells may be detected by &lt;a href="http://en.wikipedia.org/wiki/Cytology" title="Cytology"&gt;cytology&lt;/a&gt; if this fluid is &lt;a href="http://en.wikipedia.org/wiki/Needle_aspiration_biopsy" title="Needle aspiration biopsy"&gt;aspirated&lt;/a&gt; with a syringe. For pleural fluid this is done by a &lt;a href="http://en.wikipedia.org/wiki/Pleural_tap" title="Pleural tap" class="mw-redirect"&gt;pleural tap&lt;/a&gt; or &lt;a href="http://en.wikipedia.org/wiki/Chest_drain" title="Chest drain" class="mw-redirect"&gt;chest drain&lt;/a&gt;, in ascites with an &lt;a href="http://en.wikipedia.org/wiki/Paracentesis" title="Paracentesis"&gt;paracentesis&lt;/a&gt; or &lt;a href="http://en.wikipedia.org/w/index.php?title=Ascitic_drain&amp;amp;action=edit&amp;amp;redlink=1" class="new" title="Ascitic drain (page does not exist)"&gt;ascitic drain&lt;/a&gt; and in a pericardial effusion with &lt;a href="http://en.wikipedia.org/wiki/Pericardiocentesis" title="Pericardiocentesis"&gt;pericardiocentesis&lt;/a&gt;. While absence of malignant cells on cytology does not completely exclude mesothelioma, it makes it much more unlikely, especially if an alternative diagnosis can be made (e.g. &lt;a href="http://en.wikipedia.org/wiki/Tuberculosis" title="Tuberculosis"&gt;tuberculosis&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Heart_failure" title="Heart failure"&gt;heart failure&lt;/a&gt;).&lt;/p&gt; &lt;p&gt;If cytology is positive or a plaque is regarded as suspicious, a &lt;a href="http://en.wikipedia.org/wiki/Biopsy" title="Biopsy"&gt;biopsy&lt;/a&gt; is needed to confirm a diagnosis of mesothelioma. A doctor removes a sample of tissue for examination under a microscope by a &lt;a href="http://en.wikipedia.org/wiki/Histopathology" title="Histopathology"&gt;pathologist&lt;/a&gt;. A biopsy may be done in different ways, depending on where the abnormal area is located. If the cancer is in the chest, the doctor may perform a &lt;a href="http://en.wikipedia.org/wiki/Thoracoscopy" title="Thoracoscopy"&gt;thoracoscopy&lt;/a&gt;. In this procedure, the doctor makes a small cut through the chest wall and puts a thin, lighted tube called a thoracoscope into the chest between two ribs. Thoracoscopy allows the doctor to look inside the chest and obtain tissue samples.&lt;/p&gt; &lt;p&gt;If the cancer is in the abdomen, the doctor may perform a &lt;a href="http://en.wikipedia.org/wiki/Laparoscopy" title="Laparoscopy" class="mw-redirect"&gt;laparoscopy&lt;/a&gt;. To obtain tissue for examination, the doctor makes a small incision in the abdomen and inserts a special instrument into the abdominal cavity. If these procedures do not yield enough tissue, more extensive diagnostic surgery may be necessary.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Screening&lt;/span&gt;&lt;/h2&gt;There is no universally agreed protocol for screening people who have been exposed to asbestos. Screening tests might diagnose mesothelioma earlier than conventional methods thus improving the survival prospects for patients. The &lt;a href="http://en.wikipedia.org/wiki/Blood_plasma" title="Blood plasma"&gt;serum&lt;/a&gt; &lt;a href="http://en.wikipedia.org/wiki/Osteopontin" title="Osteopontin"&gt;osteopontin&lt;/a&gt; level might be useful in screening asbestos-exposed people for mesothelioma. The level of soluble mesothelin-related protein is elevated in the serum of about 75% of patients at diagnosis and it has been suggested that it may be useful for screening.&lt;sup id="cite_ref-smrp_3-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-smrp-3" title=""&gt;&lt;span&gt;[&lt;/span&gt;4&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Doctors have begun testing the &lt;a href="http://en.wikipedia.org/wiki/Mesomark_assay" title="Mesomark assay"&gt;Mesomark assay&lt;/a&gt; which measures levels of soluble &lt;a href="http://en.wikipedia.org/wiki/Mesothelin" title="Mesothelin"&gt;mesothelin&lt;/a&gt;-related proteins (SMRPs) released by diseased mesothelioma cells.&lt;sup id="cite_ref-Beyer_4-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-Beyer-4" title=""&gt;&lt;span&gt;[&lt;/span&gt;5&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Staging&lt;/span&gt;&lt;/h2&gt;Mesothelioma is described as localized if the cancer is found only on the membrane surface where it originated. It is classified as advanced if it has spread beyond the original membrane surface to other parts of the body, such as the lymph nodes, lungs, chest wall, or abdominal organs.&lt;br /&gt;&lt;br /&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Pathophysiology&lt;/span&gt;&lt;/h2&gt;&lt;p&gt;The &lt;a href="http://en.wikipedia.org/wiki/Mesothelium" title="Mesothelium"&gt;mesothelium&lt;/a&gt; consists of a single layer of flattened to cuboidal cells forming the &lt;a href="http://en.wikipedia.org/wiki/Epithelium" title="Epithelium"&gt;epithelial&lt;/a&gt; lining of the serous cavities of the body including the &lt;a href="http://en.wikipedia.org/wiki/Peritoneum" title="Peritoneum"&gt;peritoneal&lt;/a&gt;, &lt;a href="http://en.wikipedia.org/wiki/Pericardium" title="Pericardium"&gt;pericardial&lt;/a&gt; and &lt;a href="http://en.wikipedia.org/wiki/Pleura" title="Pleura" class="mw-redirect"&gt;pleural&lt;/a&gt; cavities. Deposition of asbestos fibres in the parenchyma of the lung may result in the penetration of the visceral pleura from where the fibre can then be carried to the pleural surface, thus leading to the development of malignant mesothelial plaques. The processes leading to the development of peritoneal mesothelioma remain unresolved, although it has been proposed that asbestos fibres from the lung are transported to the abdomen and associated organs via the &lt;a href="http://en.wikipedia.org/wiki/Lymphatic_system" title="Lymphatic system"&gt;lymphatic system&lt;/a&gt;. Additionally, asbestos fibres may be deposited in the gut after ingestion of sputum contaminated with asbestos fibres.&lt;/p&gt; &lt;p&gt;Pleural contamination with asbestos or other mineral fibres has been shown to cause cancer. Long thin asbestos fibers (blue asbestos, &lt;a href="http://en.wikipedia.org/wiki/Amphibole" title="Amphibole"&gt;amphibole&lt;/a&gt; fibers) are more potent carcinogens than "feathery fibers" (&lt;a href="http://en.wikipedia.org/wiki/Chrysotile" title="Chrysotile"&gt;chrysotile&lt;/a&gt; or white asbestos fibers).&lt;sup id="cite_ref-fibertypes_5-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-fibertypes-5" title=""&gt;&lt;span&gt;[&lt;/span&gt;6&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; However, there is now evidence that smaller particles may be more dangerous than the larger fibers.&lt;a href="http://www.mesothel.com/pdf/Suzuki-Yuen-01-IndHealth.pdf" class="external autonumber" title="http://www.mesothel.com/pdf/Suzuki-Yuen-01-IndHealth.pdf" rel="nofollow"&gt;[1]&lt;/a&gt;&lt;a href="http://www.mesothel.com/pdf/Suzuki-Yuen-02-AnnNYAS.pdf" class="external autonumber" title="http://www.mesothel.com/pdf/Suzuki-Yuen-02-AnnNYAS.pdf" rel="nofollow"&gt;[2]&lt;/a&gt; They remain suspended in the air where they can be inhaled, and may penetrate more easily and deeper into the lungs. "We probably will find out a lot more about the health aspects of asbestos from [the World Trade Center attack], unfortunately," said Dr. Alan Fein, chief of pulmonary and critical-care medicine at North Shore-Long Island Jewish Health System. Dr. Fein has treated several patients for "World Trade Center syndrome" or respiratory ailments from brief exposures of only a day or two near the collapsed buildings.&lt;a href="http://www.prwatch.org/prwissues/2001Q4/junkman.html" class="external autonumber" title="http://www.prwatch.org/prwissues/2001Q4/junkman.html" rel="nofollow"&gt;[3]&lt;/a&gt;&lt;/p&gt; &lt;p&gt;Mesothelioma development in rats has been demonstrated following intra-pleural inoculation of phosphorylated chrysotile fibres. It has been suggested that in humans, transport of fibres to the pleura is critical to the pathogenesis of mesothelioma. This is supported by the observed recruitment of significant numbers of &lt;a href="http://en.wikipedia.org/wiki/Macrophage" title="Macrophage"&gt;macrophages&lt;/a&gt; and other cells of the &lt;a href="http://en.wikipedia.org/wiki/Immune_system" title="Immune system"&gt;immune system&lt;/a&gt; to localised lesions of accumulated asbestos fibres in the pleural and peritoneal cavities of rats. These lesions continued to attract and accumulate macrophages as the disease progressed, and cellular changes within the lesion culminated in a morphologically malignant tumour.&lt;/p&gt; &lt;p&gt;Experimental evidence suggests that asbestos acts as a complete carcinogen with the development of mesothelioma occurring in sequential stages of initiation and promotion. The molecular mechanisms underlying the malignant transformation of normal mesothelial cells by asbestos fibres remain unclear despite the demonstration of its oncogenic capabilities. However, complete in vitro transformation of normal human mesothelial cells to malignant phenotype following exposure to asbestos fibres has not yet been achieved. In general, asbestos fibres are thought to act through direct physical interactions with the cells of the mesothelium in conjunction with indirect effects following interaction with inflammatory cells such as macrophages.&lt;/p&gt; &lt;p&gt;Analysis of the interactions between asbestos fibres and DNA has shown that phagocytosed fibres are able to make contact with &lt;a href="http://en.wikipedia.org/wiki/Chromosome" title="Chromosome"&gt;chromosomes&lt;/a&gt;, often adhering to the &lt;a href="http://en.wikipedia.org/wiki/Chromatin" title="Chromatin"&gt;chromatin&lt;/a&gt; fibres or becoming entangled within the chromosome. This contact between the asbestos fibre and the chromosomes or structural proteins of the spindle apparatus can induce complex abnormalities. The most common abnormality is &lt;a href="http://en.wikipedia.org/wiki/Monosomy" title="Monosomy"&gt;monosomy&lt;/a&gt; of chromosome 22. Other frequent abnormalities include structural rearrangement of 1p, 3p, 9p and 6q chromosome arms.&lt;/p&gt; &lt;p&gt;Common gene abnormalities in mesothelioma cell lines include deletion of the &lt;a href="http://en.wikipedia.org/wiki/Tumor_suppressor_gene" title="Tumor suppressor gene"&gt;tumor suppressor genes&lt;/a&gt;:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;&lt;a href="http://en.wikipedia.org/wiki/Neurofibromatosis" title="Neurofibromatosis"&gt;Neurofibromatosis&lt;/a&gt; type 2 at 22q12&lt;/li&gt;&lt;li&gt;P16&lt;sup&gt;INK4A&lt;/sup&gt;&lt;/li&gt;&lt;li&gt;P14&lt;sup&gt;ARF&lt;/sup&gt;&lt;/li&gt;&lt;/ul&gt; &lt;p&gt;Asbestos has also been shown to mediate the entry of foreign DNA into target cells. Incorporation of this foreign DNA may lead to mutations and oncogenesis by several possible mechanisms:&lt;/p&gt; &lt;ul&gt;&lt;li&gt;Inactivation of tumor suppressor genes&lt;/li&gt;&lt;li&gt;Activation of &lt;a href="http://en.wikipedia.org/wiki/Oncogene" title="Oncogene"&gt;oncogenes&lt;/a&gt;&lt;/li&gt;&lt;li&gt;Activation of &lt;a href="http://en.wikipedia.org/wiki/Oncogene#proto-oncogene" title="Oncogene"&gt;proto-oncogenes&lt;/a&gt; due to incorporation of foreign DNA containing a &lt;a href="http://en.wikipedia.org/wiki/Promoter" title="Promoter"&gt;promoter&lt;/a&gt; region&lt;/li&gt;&lt;li&gt;Activation of DNA repair enzymes, which may be prone to error&lt;/li&gt;&lt;li&gt;Activation of &lt;a href="http://en.wikipedia.org/wiki/Telomerase" title="Telomerase"&gt;telomerase&lt;/a&gt;&lt;/li&gt;&lt;li&gt;Prevention of &lt;a href="http://en.wikipedia.org/wiki/Apoptosis" title="Apoptosis"&gt;apoptosis&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt; &lt;p&gt;Asbestos fibers have been shown to alter the function and secretory properties of macrophages, ultimately creating conditions which favour the development of mesothelioma. Following asbestos phagocytosis, macrophages generate increased amounts of hydroxyl &lt;a href="http://en.wikipedia.org/wiki/Radical_%28chemistry%29" title="Radical (chemistry)"&gt;radicals&lt;/a&gt;, which are normal by-products of cellular anaerobic metabolism. However, these free radicals are also known &lt;a href="http://en.wikipedia.org/wiki/Clastogenic" title="Clastogenic"&gt;clastogenic&lt;/a&gt; and membrane-active agents thought to promote asbestos carcinogenicity. These oxidants can participate in the oncogenic process by directly and indirectly interacting with DNA, modifying membrane-associated cellular events, including oncogene activation and perturbation of cellular antioxidant defences.&lt;/p&gt; &lt;p&gt;Asbestos also may possess &lt;a href="http://en.wikipedia.org/wiki/Immunosuppressant" title="Immunosuppressant"&gt;immunosuppressive&lt;/a&gt; properties. For example, chrysotile fibres have been shown to depress the in vitro proliferation of phytohemagglutinin-stimulated peripheral blood lymphocytes, suppress natural killer cell lysis and significantly reduce &lt;a href="http://en.wikipedia.org/wiki/Lymphokine-activated_killer_cell" title="Lymphokine-activated killer cell"&gt;lymphokine-activated killer cell&lt;/a&gt; viability and recovery. Furthermore, genetic alterations in asbestos-activated macrophages may result in the release of potent mesothelial cell mitogens such as &lt;a href="http://en.wikipedia.org/wiki/Platelet-derived_growth_factor" title="Platelet-derived growth factor"&gt;platelet-derived growth factor&lt;/a&gt; (PDGF) and &lt;a href="http://en.wikipedia.org/wiki/Transforming_growth_factor" title="Transforming growth factor"&gt;transforming growth factor&lt;/a&gt;-β (TGF-β) which in turn, may induce the chronic stimulation and proliferation of mesothelial cells after injury by asbestos fibres.&lt;/p&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Epidemiology&lt;/span&gt;&lt;/h2&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Incidence&lt;/span&gt;&lt;/h3&gt; &lt;p&gt;Although reported incidence rates have increased in the past 20 years, mesothelioma is still a relatively rare cancer. The incidence rate is approximately one per 1,000,000. The highest incidence is found in Britain, Australia and Belgium: 30 per 1,000,000 per year.&lt;sup id="cite_ref-Bianchi_6-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-Bianchi-6" title=""&gt;&lt;span&gt;[&lt;/span&gt;7&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; For comparison, populations with high levels of smoking can have a &lt;a href="http://en.wikipedia.org/wiki/Lung_cancer#Epidemiology" title="Lung cancer"&gt;lung cancer&lt;/a&gt; incidence of over 1,000 per 1,000,000. Incidence of malignant mesothelioma currently ranges from about 7 to 40 per 1,000,000 in industrialized Western nations, depending on the amount of asbestos exposure of the populations during the past several decades.&lt;sup id="cite_ref-robinson2005_7-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-robinson2005-7" title=""&gt;&lt;span&gt;[&lt;/span&gt;8&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; It has been estimated that incidence may have peaked at 15 per 1,000,000 in the United States in 2004. Incidence is expected to continue increasing in other parts of the world. Mesothelioma occurs more often in men than in women and risk increases with age, but this disease can appear in either men or women at any age. Approximately one fifth to one third of all mesotheliomas are peritoneal.&lt;/p&gt; &lt;p&gt;Between 1940 and 1979, approximately 27.5 million people were occupationally exposed to asbestos in the United States &lt;a href="http://www.rand.org/pubs/documented_briefings/DB397/DB397.pdf" class="external autonumber" title="http://www.rand.org/pubs/documented_briefings/DB397/DB397.pdf" rel="nofollow"&gt;[4]&lt;/a&gt;. Between 1973 and 1984, there has been a threefold increase in the diagnosis of pleural mesothelioma in Caucasian males. From 1980 to the late 1990s, the death rate from mesothelioma in the USA increased from 2,000 per year to 3,000, with men four times more likely to acquire it than women. These rates may not be accurate, since it is possible that many cases of mesothelioma are misdiagnosed as adenocarcinoma of the lung, which is difficult to differentiate from mesothelioma.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Risk factors&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;Working with &lt;a href="http://en.wikipedia.org/wiki/Asbestos" title="Asbestos"&gt;asbestos&lt;/a&gt; is the major risk factor for mesothelioma.&lt;sup id="cite_ref-8" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-8" title=""&gt;&lt;span&gt;[&lt;/span&gt;9&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Mesothelioma is now known to occur in those who are genetically pre-disposed to it. A history of asbestos exposure exists in almost all cases. However, mesothelioma has been reported in some individuals without any known exposure to asbestos. In rare cases, mesothelioma has also been associated with irradiation, intrapleural thorium dioxide (Thorotrast), and inhalation of other fibrous silicates, such as erionite.&lt;/p&gt; &lt;p&gt;Asbestos is the name of a group of minerals that occur naturally as masses of strong, flexible fibers that can be separated into thin threads and woven. Asbestos has been widely used in many industrial products, including cement, brake linings, roof shingles, flooring products, textiles, and insulation. If tiny asbestos particles float in the air, especially during the manufacturing process, they may be inhaled or swallowed, and can cause serious health problems. In addition to mesothelioma, exposure to asbestos increases the risk of lung cancer, asbestosis (a noncancerous, chronic lung ailment), and other cancers, such as those of the larynx and kidney.&lt;/p&gt; &lt;p&gt;The combination of smoking and asbestos exposure significantly increases a person's risk of developing cancer of the airways (&lt;a href="http://en.wikipedia.org/wiki/Lung_cancer" title="Lung cancer"&gt;lung cancer&lt;/a&gt;, bronchial carcinoma). The Kent brand of cigarettes used asbestos in its filters for the first few years of production in the 1950s and some cases of mesothelioma have resulted. Smoking modern cigarettes does not appear to increase the risk of mesothelioma.&lt;/p&gt; &lt;p&gt;Some studies suggest that simian &lt;a href="http://en.wikipedia.org/wiki/Virus" title="Virus"&gt;virus&lt;/a&gt; 40 (&lt;a href="http://en.wikipedia.org/wiki/SV40" title="SV40"&gt;SV40&lt;/a&gt;) may act as a &lt;a href="http://en.wikipedia.org/wiki/Cofactor_%28biochemistry%29" title="Cofactor (biochemistry)"&gt;cofactor&lt;/a&gt; in the development of mesothelioma.&lt;sup id="cite_ref-sv40_9-0" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-sv40-9" title=""&gt;&lt;span&gt;[&lt;/span&gt;10&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Exposure&lt;/span&gt;&lt;/h3&gt;Asbestos was known in antiquity, but it wasn't mined and widely used commercially until the late 1800s. Its use greatly increased during &lt;a href="http://en.wikipedia.org/wiki/World_War_II" title="World War II"&gt;World War II&lt;/a&gt;. Since the early 1940s, millions of American workers have been exposed to asbestos dust. Initially, the risks associated with asbestos exposure were not publicly known. However, an increased risk of developing mesothelioma was later found among shipyard workers, people who work in asbestos mines and mills, producers of asbestos products, workers in the heating and construction industries, and other tradespeople. Today, the U.S. &lt;a href="http://en.wikipedia.org/wiki/Occupational_Safety_and_Health_Administration" title="Occupational Safety and Health Administration"&gt;Occupational Safety and Health Administration&lt;/a&gt; (OSHA) sets limits for acceptable levels of asbestos exposure in the workplace, and created guidelines for engineering controls and respirators, protective clothing, exposure monitoring, hygiene facilities and practices, warning signs, labeling, recordkeeping, and medical exams. By contrast, the British Government's &lt;a href="http://en.wikipedia.org/wiki/Health_and_Safety_Executive" title="Health and Safety Executive"&gt;Health and Safety Executive&lt;/a&gt; (HSE) states formally that any threshold for mesothelioma must be at a very low level and it is widely agreed that if any such threshold does exist at all, then it cannot currently be quantified. For practical purposes, therefore, HSE does not assume that any such threshold exists. People who work with asbestos wear personal protective equipment to lower their risk of exposure. Recent findings have shown that a mineral called erionite has been known to cause genetically pre-dispositioned individuals to have malignant mesothelioma rates much higher than those not pre-dispositioned genetically. A study in Cappadocia, Turkey has shown that 3 villiages in Turkey have death rates of 51% attributed to erionite related mesothelioma.&lt;h4&gt;&lt;span class="mw-headline"&gt;Occupational&lt;/span&gt;&lt;/h4&gt;&lt;p&gt;Exposure to asbestos fibres has been recognised as an occupational health hazard since the early 1900s. Several epidemiological studies have associated exposure to asbestos with the development of lesions such as asbestos bodies in the sputum, pleural plaques, diffuse pleural thickening, asbestosis, carcinoma of the lung and larynx, gastrointestinal tumours, and diffuse mesothelioma of the pleura and peritoneum.&lt;/p&gt; &lt;p&gt;The documented presence of asbestos fibres in water supplies and food products has fostered concerns about the possible impact of long-term and, as yet, unknown exposure of the general population to these fibres. Although many authorities consider brief or transient exposure to asbestos fibres as inconsequential and an unlikely risk factor, some epidemiologists claim that there is no risk threshold. Cases of mesothelioma have been found in people whose only exposure was breathing the air through ventilation systems. Other cases had very minimal (3 months or less) direct exposure.&lt;/p&gt; &lt;p&gt;Commercial asbestos mining at Wittenoom, Western Australia, occurred between 1945 and 1966. A cohort study of miners employed at the mine reported that while no deaths occurred within the first 10 years after crocidolite exposure, 85 deaths attributable to mesothelioma had occurred by 1985. By 1994, 539 reported deaths due to mesothelioma had been reported in Western Australia.&lt;/p&gt;&lt;h4&gt;&lt;span class="mw-headline"&gt;Paraoccupational secondary exposure&lt;/span&gt;&lt;/h4&gt;Family members and others living with asbestos workers have an increased risk of developing mesothelioma, and possibly other asbestos related diseases. This risk may be the result of exposure to asbestos dust brought home on the clothing and hair of asbestos workers. To reduce the chance of exposing family members to asbestos fibres, asbestos workers are usually required to shower and change their clothing before leaving the workplace.&lt;h4&gt;&lt;span class="mw-headline"&gt;Asbestos in buildings&lt;/span&gt;&lt;/h4&gt;Many building materials used in both public and domestic premises prior to the banning of asbestos may contain asbestos. Those performing renovation works or &lt;a href="http://en.wikipedia.org/wiki/Do_it_yourself" title="Do it yourself"&gt;DIY&lt;/a&gt; activities may expose themselves to asbestos dust. In the UK use of Chrysotile asbestos was banned at the end of 1999. Brown and blue asbestos was banned in the UK around 1985. Buildings built or renovated prior to these dates may contain asbestos materials.&lt;h4&gt;&lt;span class="mw-headline"&gt;Environmental exposures&lt;/span&gt;&lt;/h4&gt;Incidence of mesothelioma had been found to be higher in populations living near naturally occurring asbestos. For example, in &lt;a href="http://en.wikipedia.org/wiki/Cappadocia" title="Cappadocia"&gt;Cappadocia&lt;/a&gt;, Turkey, an unprecedented mesothelioma epidemic caused 50% of all deaths in three small villages. Initially, this was attributed to &lt;a href="http://en.wikipedia.org/w/index.php?title=Erionite&amp;amp;action=edit&amp;amp;redlink=1" class="new" title="Erionite (page does not exist)"&gt;erionite&lt;/a&gt;, however, recently, it has been shown that erionite causes mesothelioma mostly in families with a genetic predisposition&lt;sup id="cite_ref-10" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-10" title=""&gt;&lt;span&gt;[&lt;/span&gt;11&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt;.&lt;br /&gt;&lt;br /&gt;&lt;h2&gt;&lt;span class="mw-headline"&gt;Treatment&lt;/span&gt;&lt;/h2&gt;Treatment of &lt;a href="http://en.wikipedia.org/wiki/Malignant_mesothelioma" title="Malignant mesothelioma"&gt;malignant mesothelioma&lt;/a&gt; using conventional therapies has not proved successful and patients have a &lt;a href="http://en.wikipedia.org/wiki/Median" title="Median"&gt;median&lt;/a&gt; survival time of 6 - 12 months after presentation&lt;sup class="noprint Template-Fact"&gt;&lt;span title="This claim needs references to reliable sources since January 2008" style="white-space: nowrap;"&gt;[&lt;i&gt;&lt;a href="http://en.wikipedia.org/wiki/Wikipedia:Citation_needed" title="Wikipedia:Citation needed"&gt;citation needed&lt;/a&gt;&lt;/i&gt;]&lt;/span&gt;&lt;/sup&gt;. The clinical behaviour of the malignancy is affected by several factors including the continuous mesothelial surface of the pleural cavity which favours local metastasis via exfoliated cells, invasion to underlying tissue and other organs within the pleural cavity, and the extremely long latency period between asbestos exposure and development of the disease.&lt;h3&gt;&lt;span class="mw-headline"&gt;Surgery&lt;/span&gt;&lt;/h3&gt;Surgery, either by itself or used in combination with pre- and post-operative adjuvant therapies, has proved disappointing. A pleurectomy/decortication is the most common surgery, in which the lining of the chest is removed. Less common is an extrapleural pneumonectomy (EPP), in which the lung, lining of the inside of the chest, the hemi-&lt;a href="http://en.wikipedia.org/wiki/Thoracic_diaphragm" title="Thoracic diaphragm"&gt;diaphragm&lt;/a&gt; and the &lt;a href="http://en.wikipedia.org/wiki/Pericardium" title="Pericardium"&gt;pericardium&lt;/a&gt; are removed.&lt;h3&gt;&lt;span class="mw-headline"&gt;Radiation&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;For patients with localized disease, and who can tolerate a radical surgery, radiation is often given post-operatively as a consolidative treatment. The entire hemi-thorax is treated with radiation therapy, often given simultaneously with chemotherapy. This approach of using surgery followed by radiation with chemotherapy has been pioneered by the thoracic oncology team at Brigham &amp;amp; Women's Hospital in Boston.&lt;sup id="cite_ref-11" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-11" title=""&gt;&lt;span&gt;[&lt;/span&gt;12&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; Delivering radiation and chemotherapy after a radical surgery has led to extended life expectancy in selected patient populations with some patients surviving more than 5 years. As part of a curative approach to mesothelioma, radiotherapy is also commonly applied to the sites of &lt;a href="http://en.wikipedia.org/wiki/Chest_drain" title="Chest drain" class="mw-redirect"&gt;chest drain&lt;/a&gt; insertion, in order to prevent growth of the tumor along the track in the chest wall.&lt;/p&gt; &lt;p&gt;Although mesothelioma is generally resistant to curative treatment with &lt;a href="http://en.wikipedia.org/wiki/Radiotherapy" title="Radiotherapy" class="mw-redirect"&gt;radiotherapy&lt;/a&gt; alone, palliative treatment regimens are sometimes used to relieve symptoms arising from tumor growth, such as obstruction of a major blood vessel. Radiation therapy when given alone with curative intent has never been shown to improve survival from mesothelioma. The necessary radiation dose to treat mesothelioma that has not been surgically removed would be very toxic.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Chemotherapy&lt;/span&gt;&lt;/h3&gt; &lt;p&gt;In February 2004, the United States &lt;a href="http://en.wikipedia.org/wiki/Food_and_Drug_Administration" title="Food and Drug Administration" class="mw-redirect"&gt;Food and Drug Administration&lt;/a&gt; approved &lt;a href="http://en.wikipedia.org/wiki/Pemetrexed" title="Pemetrexed"&gt;pemetrexed&lt;/a&gt; (brand name Alimta) for treatment of malignant pleural mesothelioma. Pemetrexed is given in combination with &lt;a href="http://en.wikipedia.org/wiki/Cisplatin" title="Cisplatin"&gt;cisplatin&lt;/a&gt;. &lt;a href="http://en.wikipedia.org/wiki/Folic_acid" title="Folic acid"&gt;Folic acid&lt;/a&gt; is also used to reduce the side-effects of pemetrexed.&lt;/p&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Chemotherapy&lt;/span&gt;&lt;/h3&gt;&lt;h3&gt;&lt;span class="mw-headline"&gt;Immunotherapy&lt;/span&gt;&lt;/h3&gt;Treatment regimens involving immunotherapy have yielded variable results. For example, intrapleural inoculation of &lt;a href="http://en.wikipedia.org/wiki/Bacillus_Calmette-Gu%C3%A9rin" title="Bacillus Calmette-Guérin"&gt;Bacillus Calmette-Guérin&lt;/a&gt; (BCG) in an attempt to boost the immune response, was found to be of no benefit to the patient (while it may benefit patients with &lt;a href="http://en.wikipedia.org/wiki/Bladder_cancer" title="Bladder cancer"&gt;bladder cancer&lt;/a&gt;). Mesothelioma cells proved susceptible to in vitro lysis by LAK cells following activation by &lt;a href="http://en.wikipedia.org/wiki/Interleukin-2" title="Interleukin-2" class="mw-redirect"&gt;interleukin-2&lt;/a&gt; (IL-2), but patients undergoing this particular therapy experienced major side effects. Indeed, this trial was suspended in view of the unacceptably high levels of IL-2 toxicity and the severity of side effects such as fever and cachexia. Nonetheless, other trials involving interferon alpha have proved more encouraging with 20% of patients experiencing a greater than 50% reduction in tumor mass combined with minimal side effects.&lt;h3&gt;&lt;span class="mw-headline"&gt;Heated Intraoperative Intraperitoneal Chemotherapy&lt;/span&gt;&lt;/h3&gt;&lt;p&gt;A procedure known as heated intraoperative intraperitoneal chemotherapy was developed by Paul Sugarbaker at the Washington Cancer Institute.&lt;sup id="cite_ref-12" class="reference"&gt;&lt;a href="http://en.wikipedia.org/wiki/Mesothelioma#cite_note-12" title=""&gt;&lt;span&gt;[&lt;/span&gt;13&lt;span&gt;]&lt;/span&gt;&lt;/a&gt;&lt;/sup&gt; The surgeon removes as much of the tumor as possible followed by the direct administration of a chemotherapy agent, heated to between 40 and 48°C, in the abdomen. The fluid is perfused for 60 to 120 minutes and then drained.&lt;/p&gt; &lt;p&gt;This technique permits the administration of high concentrations of selected drugs into the abdominal and pelvic surfaces. Heating the chemotherapy treatment increases the penetration of the drugs into tissues. Also, heating itself damages the malignant cells more than the normal cells.&lt;/p&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-2788929249409503925?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/2788929249409503925/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=2788929249409503925' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/2788929249409503925'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/2788929249409503925'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/02/mesothelioma.html' title='Mesothelioma'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-1823248598332870778</id><published>2009-01-12T22:55:00.009+05:00</published><updated>2009-01-12T22:58:52.686+05:00</updated><title type='text'>Dell</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Dell"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 175px; height: 177px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SWuEVSTTs_I/AAAAAAAAADo/1rKVEuwcQK4/s320/Dell.png" alt="" id="BLOGGER_PHOTO_ID_5290467688501720050" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Dell, Inc.&lt;br /&gt;&lt;br /&gt;is a multinational technology corporation that develops, manufactures, sells, and supports personal computers and other computer-related products. Based in Round Rock, Texas, Dell employs more than 82,700 people worldwide.[2]&lt;br /&gt;&lt;br /&gt;Dell grew during the 1980s and 1990s to become (for a time) the largest seller of PCs and servers. As of 2008[update] it held the second spot in computer-sales within the industry behind the Hewlett-Packard Company. The company currently sells personal computers, servers, data storage devices, network switches, software, and computer peripherals. Dell also sells HDTVs that are manufactured by other brands.&lt;br /&gt;&lt;br /&gt;In 2006, Fortune magazine ranked Dell as the 25th-largest company in the Fortune 500 list, 8th on its annual "Top 20" list of the most-admired companies in the United States.[3] In 2007 Dell ranked 34th and 8th respectively on the equivalent lists for the year. A 2006 publication identified Dell as one of 38 high-performance companies in the S&amp;amp;P 500 which had consistently out-performed the market over the previous 15 years.[4]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Background and origins&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;While a student at the University of Texas at Austin in 1984, Michael Dell founded the company as PC's Limited with capital of $1000.[5] Operating from Michael Dell's off-campus dorm-room at Dobie Center [1], the startup aimed to sell IBM PC-compatible computers built from stock components. Michael Dell started trading in the belief that by selling personal computer-systems directly to customers, PC's Limited could better understand customers' needs and provide the most effective computing solutions to meet those needs.[citation needed] Michael Dell dropped out of school in order to focus full-time on his fledgling business, after getting about $300,000 in expansion-capital from his family.&lt;br /&gt;&lt;br /&gt;In 1985, the company produced the first computer of its own design — the "Turbo PC", sold for US$795[6] — which contained an Intel 8088-compatible processor running at a speed of 8 MHz. PC's Limited advertised the systems in national computer-magazines for sale directly to consumers, and custom-assembled each ordered unit according to a selection of options. This offered buyers prices lower than those of retail brands, but with greater convenience than assembling the components themselves. Although not the first company to use this model, PC's Limited became one of the first to succeed with it. The company grossed more than $73 million in its first year of trading.&lt;br /&gt;&lt;br /&gt;The company changed its name to "Dell Computer Corporation" in 1988. In 1989, Dell Computer set up its first on-site-service programs in order to compensate for the lack of local retailers prepared to act as service centers. Also in 1987, the company set up its first operations in the Ireland; eleven more international operations followed within the next four years. In June 1988, Dell's market capitalization grew by $30 million to $80 million from its June 22 initial public offering of 3.5 million shares at $8.50 a share[7]. In 1990, Dell Computer Corporation tried selling its products indirectly through warehouse clubs and computer superstores, but met with little success, and the company re-focused on its more successful direct-to-consumer sales model. In 1992, Fortune magazine included Dell Computer Corporation in its list of the world's 500 largest companies.&lt;br /&gt;&lt;br /&gt;In 1996, Dell began selling computers via its web site.&lt;br /&gt;&lt;br /&gt;In 1999, Dell overtook Compaq to become the largest seller of personal computers in the United States of America with $25 billion in revenue reported in January 2000.&lt;br /&gt;&lt;br /&gt;In 2002, Dell attempted to expand by tapping into the multimedia and home-entertainment markets with the introduction of televisions, handhelds, and digital audio players. Dell has also produced Dell-brand printers for home and small-office use.&lt;br /&gt;&lt;br /&gt;In 2003, at the annual company meeting, the stockholders approved changing the company name to "Dell Inc." to recognize the company's expansion beyond computers.&lt;br /&gt;&lt;br /&gt;In 2004, the company announced that it would build a new assembly-plant near Winston-Salem, North Carolina; the city and county provided Dell with $37.2 million in incentive packages; the state provided approximately $250 million in incentives and tax breaks. In July, Michael Dell stepped aside as Chief Executive Officer while retaining his position as Chairman of the Board. Kevin Rollins, who had held a number of executive posts at Dell, became the new CEO.&lt;br /&gt;&lt;br /&gt;In 2005, the share of sales coming from international markets increased, as revealed in the company's press releases for the first two quarters of its fiscal 2005 year. In February 2005 Dell appeared in first place in a ranking of the "Most Admired Companies" published by Fortune magazine. In November 2005 BusinessWeek magazine published an article titled "It's Bad to Worse at Dell" about shortfalls in projected earnings and sales, with a worse-than-predicted third-quarter financial performance — a bad omen for a company that had routinely underestimated its earnings. Dell acknowledged that faulty capacitors on the motherboards of the Optiplex GX270 and GX280 had already cost the company $300 million. The CEO, Kevin Rollins, attributed the bad performance partially to Dell's focus on low-end PCs.&lt;br /&gt;&lt;br /&gt;In 2006, Dell purchased the computer hardware manufacturer Alienware. Dell Inc.'s plan anticipated Alienware continuing to operate independently under its existing management. Alienware expected to benefit from Dell's efficient manufacturing system.[8]&lt;br /&gt;&lt;br /&gt;On January 31, 2007, Kevin B. Rollins, CEO of the company since 2004, resigned as both CEO and as a director, and Michael Dell resumed his former role as CEO. Investors and many shareholders had called for Rollins' resignation because of poor company performance. At the same time, the company announced that, for the fourth time in five quarters, earnings would fail to reach consensus analyst-estimates.&lt;br /&gt;&lt;br /&gt;In February 2007 Dell became the subject of formal investigations by the US SEC[9] and the United States Attorney for the Southern District of New York.[10] The company has not formally filed financial reports for either the third or fourth fiscal quarter of 2006, and several class-action lawsuits[11] have arisen in the wake of its recent[update] financial performance. Dell Inc's lack of formal financial disclosure would normally subject the company to de-listing from the NASDAQ,[12] but the exchange has granted Dell a waiver, allowing the stock to trade normally.[13]&lt;br /&gt;&lt;br /&gt;On March 1, 2007, the company issued a preliminary quarterly earnings report which showed gross sales of $14.4 billion, down 5% year-over-year, and net income of $687 million (30 cents per share), down 33%. Net earnings would have declined even more if not for the effects of eliminated employee bonuses, which accounted for six cents per share. NASDAQ extended the company's deadline for filing financials to May 4.[14]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dell and AMD&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;When Dell acquired Alienware early in 2006, some Alienware systems had AMD chips. On August 17, 2006, a Dell press-release stated that starting in September [15], Dell Dimension desktop computers would have AMD processors and that later in the year Dell would release a two-socket, quad-processor server using AMD Opteron chips, moving away from Dell's tradition of only offering Intel processors in their PCs.&lt;br /&gt;&lt;br /&gt;CNet's News.com on August 17, 2006 cited Dell's CEO Kevin Rollins as attributing the move to AMD processors to cost-advantage and to AMD technology[16]. AMD's senior VP in commercial business, Marty Seyer, stated: "Dell's wider embrace of AMD processor-based offerings is a win for Dell, for the industry and most importantly for Dell customers."&lt;br /&gt;&lt;br /&gt;On October 23, 2006, Dell announced new AMD-based servers — the PowerEdge 6950 and the PowerEdge SC1435.&lt;br /&gt;&lt;br /&gt;On November 1, 2006, Dell's website began offering notebooks with AMD processors (the Inspiron 1501 with a 15.4-inch (390 mm) display) with the choice of a single-core MK-36 processor[17], dual-core Turion X2 chips or Mobile Sempron.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dell and desktop Linux&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;First attempt (2000)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In 1998 Ralph Nader asked Dell (and five other major OEMs) to offer alternate operating systems to Microsoft Windows, specifically including Linux, for which "there is clearly a growing interest"[18][19] Possibly coincidentally, Dell started offering Linux notebook systems which "cost no more than their Windows 98 counterparts" in 2000,[20] and soon expanded, with Dell becoming "the first major manufacturer to offer Linux across its full product line"[21] However, by early 2001 Dell had "disbanded its Linux business unit."[22]&lt;br /&gt;&lt;br /&gt;The reason(s) for such a quick reversal remain the subject of debate. Court documents accused Microsoft of coercing OEMs to drop Linux:&lt;br /&gt;&lt;br /&gt;   Microsoft executive Joachim Kempin described his plan of retaliation and coercion to shut down competition from Linux: "I am thinking of hitting the OEM harder than in the past with anti-Linux actions" and will "further try to restrict source code deliveries where possible and be less gracious when interpreting agreements — again without being obvious about it," continuing "this will be a delicate dance"[23]&lt;br /&gt;&lt;br /&gt;While in a 2003 interview Michael Dell denied that Microsoft pressured Dell Inc. into doing an about-face with regard to desktop Linux, citing a lack of sales: "unfortunately the desktop Linux market didn't develop in volume. It's more of a server opportunity" but adding: "We continue to offer Linux on the desktop and there is nothing else to say."[24] However, a 2004 report noted that Dell no longer offered pre-installed desktop Linux:&lt;br /&gt;&lt;br /&gt;   So what does it mean "factory installed Linux"? If you want Dell to install Linux for you, first add on $119. But here is the annoying part. They won't send you a computer with Linux pre-installed. They sell you the computer and the boxes of software on the side, and then they make an appointment to send you someone who comes to your house or business and installs it there.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Ubuntu on Dell systems&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On February 26, 2007 Dell announced that it had commenced a program to sell and distribute a range of computers with pre-installed Linux distributions as an alternative to Microsoft Windows. Dell indicated that Novell's SUSE Linux would appear first.[26] However, Dell on February 27, 2007 announced that its previous announcement related to certifying the hardware as ready to work with Novell SUSE Linux and that it (Dell) had no plans to sell systems pre-installed with Linux in the near future.[27] On March 28, 2007, Dell announced that it would begin shipping some desktops and laptops with Linux pre-installed, although it did not specify which distribution of Linux or which hardware would lead.[28] On April 18, 2007 a report appeared suggesting that Michael Dell used Ubuntu on one of his home systems.[29] On May 1, 2007, Dell announced it would ship the Ubuntu Linux distribution.[30] On May 24, 2007, Dell started selling models with Ubuntu Linux 7.04 pre-installed: a laptop, a budget computer, and a high-end PC.[31]&lt;br /&gt;&lt;br /&gt;On June 27, 2007, Dell announced on its Direct2Dell blog that it planned to offer more pre-loaded systems (the new Dell Inspiron desktops and laptops). After the IdeaStorm site supported extending the bundles beyond the US market, Dell later announced more international marketing.[32] On August 7, 2007, Dell officially announced that it would offer one notebook and one desktop in the UK, France and Germany with Ubuntu "pre-installed". At LinuxWorld 2007 Dell announced plans to provide Novell's SUSE Linux Enterprise Desktop on selected models in China, "factory-installed".[33] On November 30, 2007 Dell reported shipping 40,000 Ubuntu PCs.[34] On January 24, 2008 Dell in Germany, Spain, UK and France launched a second laptop, a XPS M1330 with Ubuntu 7.10, for 849 euro or GBP 599 upwards.[35] On February 22, 2008 Dell announced plans to sell Ubuntu in Canada and in Latin America[36] From September 16, 2008, Dell has shipped both Dell Ubuntu Netbook Remix and Windows XP Home versions of the Inspiron Mini 9 and the Inspiron Mini 12. At the present time, the Inspiron Mini 9 and the Inspiron Mini 12 laptops are being shipped with ubuntu 8.04 version. It is expected in the future that Dell will offer ubuntu 8.10 on the mini 9 and mini 12.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Personnel&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On January 31, 2007 Michael Dell returned to the company as CEO. As chairman of the board, Mr. Dell had significant input into the company's operations during Rollins' years as CEO. However with the return of Michael Dell as CEO, the company saw immediate changes in operations, the exodus of many senior vice-presidents and new personnel brought in from outside the company.&lt;br /&gt;&lt;br /&gt;Departures announced include:&lt;br /&gt;&lt;br /&gt;   * Kevin Rollins, CEO[37]&lt;br /&gt;   * James Schneider, CFO[37]&lt;br /&gt;   * John Medica, senior vice president, consumer products[38]&lt;br /&gt;   * Joe Marengi, senior vice president, Americas[38]&lt;br /&gt;   * John Hamlin, senior vice president, worldwide online operations[39]&lt;br /&gt;   * Paul McKinnon, senior vice president, human resources[38]&lt;br /&gt;   * Rosenda Parra, senior vice president/general manager, home and small business group[40]&lt;br /&gt;   * Glenn E. Neland, senior vice president, procurement[41]&lt;br /&gt;&lt;br /&gt;Additions announced include:&lt;br /&gt;&lt;br /&gt;   * Michael Dell, CEO and co-Chairman of the Board (previously Chairman of the Board)&lt;br /&gt;   * Don Carty, CFO and co-Chairman of the Board (previously Board member)&lt;br /&gt;   * Michael R. Cannon, former CEO of Solectron, as President, Global Operations[42]&lt;br /&gt;   * Ron Garriques, who formerly headed Motorola's mobile phone unit, as President, Global Consumer Group[43]&lt;br /&gt;   * Stephen F. Schuckenbrock, Senior Vice President, Global Services[41]&lt;br /&gt;&lt;br /&gt;Mr. Dell announced a number of initiatives and plans (part of the "Dell 2.0" initiative) to improve the company's financial performance. These include:&lt;br /&gt;&lt;br /&gt;   * elimination of 2006 bonuses for employees with some discretionary awards&lt;br /&gt;   * reduction in the number of managers reporting directly to Mr. Dell from 20 to 12&lt;br /&gt;   * in a noted departure from previous years, "build, partner, and buy" to increase services capabilities&lt;br /&gt;   * reduction of "bureaucracy"&lt;br /&gt;&lt;br /&gt;On April 23, 2008, Dell announced the closure of one of its biggest Canadian call-centers in Kanata, Ontario — terminating approximately 1100 employees, with 500 of those redundancies effective on the spot, and with the official closure of the center scheduled for the summer. The call-center had opened in 2006 after the city of Ottawa won a bid to host it. Less then a year later, Dell Inc planned to double its workforce to nearly 3,000 workers and to add a new building. Journalists cited a high Canadian dollar and suggested high pay-rates as among the reasons for the cuts. [44] The company had also announced the shutdown of its Edmonton, Alberta office, losing 900 jobs. In total, Dell announced the ending of about 8,800 jobs in 2007-2008 — 10% of its workforce.[45] On January 8 2009 Dell announced the closure of its manafacturing plant in Limerick, Ireland with the loss of 1,900 jobs and the tranfer of production to its plant in Poland.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Products&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Scope and brands&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The corporation markets specific brand names to different market segments:&lt;br /&gt;&lt;br /&gt;   * Business/Corporate Class: including OptiPlex, Latitude, and Precision, where the company's advertising emphasizes long life-cycles, reliability and serviceability:&lt;br /&gt;&lt;br /&gt;       * OptiPlex - office desktop computer systems&lt;br /&gt;       * Vostro - office/small business desktop and notebook systems&lt;br /&gt;       * n Series - desktop and notebook computers shipped with Linux or FreeDOS installed&lt;br /&gt;       * Latitude - commercially-focused notebooks&lt;br /&gt;       * Precision - workstation systems and high-performance notebooks. (Some of them including Linux pre-installed.[46])&lt;br /&gt;       * PowerEdge - business servers&lt;br /&gt;       * PowerVault - direct-attach and some network-attached storage (NAS)&lt;br /&gt;       * PowerConnect - network switches&lt;br /&gt;       * Dell EMC - storage area networks (SANs)&lt;br /&gt;       * EqualLogic - enterprise class iSCSI SANs&lt;br /&gt;&lt;br /&gt;   * Home Office/Consumer Class: including Inspiron and XPS brands, emphasizing value, performance and expandability:&lt;br /&gt;&lt;br /&gt;       * Inspiron - consumer desktop and notebook systems&lt;br /&gt;       * Studio - medium-end consumer slim hybrid desktop and laptop systems&lt;br /&gt;       * XPS - enthusiast and high-performance desktop and notebook systems&lt;br /&gt;       * Alienware (XPS Extreme) - high-performance gaming systems&lt;br /&gt;       * Adamo - high-end laptop brand to compete with the Macbook Air&lt;br /&gt;&lt;br /&gt;   * Peripherals: Dell has also diversified its product line to include peripheral products such as USB keydrives, LCD televisions, and printers.&lt;br /&gt;&lt;br /&gt;       * Dell monitors LCD TVs, plasma TVs and projectors for HDTV and monitors&lt;br /&gt;&lt;br /&gt;   * Services and support:&lt;br /&gt;&lt;br /&gt;       * Dell On Call - extended support services (mainly for the removal of spyware and computer viruses)&lt;br /&gt;       * Dell Support Center - extended support services (similar to "Dell On Call") for customers in the EMEA. The Solution Centers also support hardware for customers outside of warranty.&lt;br /&gt;       * Dell Business Support - a commercial service-contract that provides an industry-certified technician with a lower call-volume than in normal queues; it covers hardware- and some software-support.&lt;br /&gt;       * Your Tech Team - a new[update] support-queue available to home users who purchased their systems through either Dell's website or Dell phone-centers. These customers gain access to a specialized queue currently[update] located in Tampa, Florida. Customers can request a technician with whom they have worked previously, and the technicians can troubleshoot a wider range of problems — including some that would fall under the "Dell on Call" category. Data backup and virus removal remain out-of-scope for this queue.&lt;br /&gt;&lt;br /&gt;Dell also offers Red Hat and SUSE Linux for servers; as well as "bare-bones" computers without pre-installed software (available on n Series by default and by request on XPS and Inspiron systems) at significantly lower prices. Due to Dell's licensing contract with Microsoft, Dell allegedly[citation needed] cannot offer those systems on their website and customers have to request them explicitly. (Dell does offer those systems on their web site at http://www.dell.com/content/products/features.aspx/precn_n?c=us&amp;amp;cs=04&amp;amp;l=en&amp;amp;s=bsd&amp;amp;redirect=1 ). Dell has to ship such systems with a FreeDOS disk included in the box and must issue a so-called "Windows refund" or a merchandise credit after sale of the system at the "regular" retail price.&lt;br /&gt;&lt;br /&gt;   * Discontinued products/brands:&lt;br /&gt;&lt;br /&gt;       * Axim - PDAs using Microsoft's Windows Mobile (discontinued on April 9, 2007[47])&lt;br /&gt;       * Dimension - home and "small office, home office" desktop computers (discontinued July 2007; replaced by Inspiron desktops)&lt;br /&gt;       * Dell Digital Jukebox - MP3 players (discontinued August 2006)&lt;br /&gt;       * Dell PowerApp - application-based severs&lt;br /&gt;       * Dell Omniplex - 486- and Pentium-based desktop and tower computers previously supported to run server and desktop operating systems.&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Manufacturing&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In the 1980s Dell became a pioneer in the “configure to order” approach to manufacturing – delivering individual PCs configured to customer specifications. In contrast, most PC manufacturers in those times delivered large orders to intermediaries on a quarterly basis.[48]&lt;br /&gt;&lt;br /&gt;To minimize the delay between purchase and delivery, Dell has a general policy of manufacturing its products close to its customers. This also allows for implementing a just-in-time (JIT) manufacturing approach, which minimizes inventory costs. Low inventory is another signature of the Dell business model – a critical consideration in an industry where components depreciate very rapidly.[49]&lt;br /&gt;&lt;br /&gt;Dell’s manufacturing process covers assembly, software installation, functional testing (including "burn-in"), and quality control. Throughout most of the company’s history, Dell manufactured desktop machines in-house and contracted out manufacturing of base notebooks for configuration in-house.[50] However, the company's approach appears to have started to change. The 2006 Annual Report states “we are continuing to expand our use of original design manufacturing partnerships and manufacturing outsourcing relationships.” The Wall Street Journal reported in September, 2008 that “Dell has approached contract computer manufacturers with offers to sell" their plants.[51]&lt;br /&gt;&lt;br /&gt;Assembly of desktop computers for the North American market takes place at Dell plants in Austin TX (original location), Lebanon TN and Nashville, Tennessee (opened in 1999), Winston-Salem NC (opened in 2005) and at the Miami, Florida facility of its Alienware subsidiary. Dell servers come from Austin TX.&lt;br /&gt;&lt;br /&gt;Dell assembles computers for the EMEA market at Limerick in the Republic of Ireland, and employs about 4,500 people in that country. Production at the Limerick facility will cease in 2009 and will be relocated to facilities in Poland and Asia. European Manufacturing Facility 1 (EMF1, opened in 1990) and EMF3 form part of the Raheen Industrial Estate near Limerick. EMF2 (previously a Wang facility, later occupied by Flextronics, situated in Castletroy) closed in 2002,[citation needed] and Dell Inc has consolidated production into EMF3 (EMF1 now contains only offices[52]). Dell’s Alienware subsidiary also manufactures PCs in an Athlone, Ireland plant. Construction of EMF4 in Łódź, Poland has started[update]: Dell started production there in autumn 2007.[53]&lt;br /&gt;&lt;br /&gt;Dell opened plants in Penang, Malaysia in 1995, and in Xiamen, China in 1999. These facilities serve the Asian market and assemble 95% of Dell notebooks. Dell Inc has invested an estimated (U.S.) $60 million in a new manufacturing unit in Chennai, India, to support the sales of its products in the Indian subcontinent. Indian-made products will bear the "Made in India" mark. In 2007 the Chennai facility had the target of producing 400,000 desktop PCs, and plans envisaged it starting to produce notebook PCs and other products in the second half of 2007.[citation needed]&lt;br /&gt;&lt;br /&gt;Dell moved desktop and PowerEdge server manufacturing for the South American market from the Eldorado do Sul plant opened in 1999, to a new plant in Hortolandia, Brazil in 2007.[54]&lt;br /&gt;&lt;br /&gt;Dell began manufacturing in Limerick in 1991 and went on to become Ireland's largest exporter of goods and second largest company and foreign investor. On the 8th of January 2009, Dell announced that they will withdraw all manufacturing from Limerick and move it to its new plant in the Polish city of Lodz by January 2010.[55] European Union officials said they would investigate a €52.7million aid package the Polish Government used to attract Dell away from Ireland.[56]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-1823248598332870778?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/1823248598332870778/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=1823248598332870778' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1823248598332870778'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1823248598332870778'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/dell.html' title='Dell'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SWuEVSTTs_I/AAAAAAAAADo/1rKVEuwcQK4/s72-c/Dell.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-5992277615341009388</id><published>2009-01-08T16:22:00.002+05:00</published><updated>2009-01-08T16:25:44.401+05:00</updated><title type='text'>Compaq</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Compaq"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 150px; height: 84px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/SWXirXk-HbI/AAAAAAAAADg/6e4kv4uJlbU/s320/compaq.png" alt="" id="BLOGGER_PHOTO_ID_5288882572107849138" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Compaq Computer Corporation was an American personal computer company founded in 1982, and is now a brand name of Hewlett-Packard.&lt;br /&gt;&lt;br /&gt;The company was formed by Rod Canion, Jim Harris and Bill Murto — former Texas Instruments senior managers. The name "COMPAQ" was derived from "Compatibility and Quality", as at its formation Compaq produced some of the first IBM PC compatible computers.&lt;br /&gt;&lt;br /&gt;Once the largest supplier of personal computing systems in the world[1], Compaq existed as an independent corporation until 2002, when it merged with Hewlett-Packard.&lt;br /&gt;&lt;br /&gt;Prior to its takeover the company was headquartered in northwest unincorporated Harris County, Texas, United States.[2]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;History&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;1980s&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Compaq was founded in February 1982 by Rod Canion, Jim Harris and Bill Murto, three senior managers from semiconductor manufacturer Texas Instruments. Each invested $1,000 to form the company. Their first venture capital came from Ben Rosen and Sevin Rosen Funds. Like many small startups with unique beginnings, the original Compaq PC was first sketched out on a placemat by the founders while dining in a local Houston restaurant, House of Pies.&lt;br /&gt;&lt;br /&gt;Two key marketing executives in Compaq's early years, Jim D'Arezzo and Sparky Sparks, had come from IBM's PC Group. Other key executives responsible for the company's meteoric growth in the late 80s and early 90s were Ross A. Cooley, another former IBMer, who served for many years as SVP and GM North America; Michael Swavely, who was the company's chief marketing officer in the early years, and eventually ran the North America organization, later passing along that responsibility to Mr. Cooley, when Swavely retired. In the United States, Brendan A. "Mac" McLoughlin (another long time IBM executive) lead the company's field sales organization after starting up the Western U.S. Area of Operations. These gifted executives, along with other key contributors, including Kevin Ellington, Douglas Johns, Steven Flannigan, and Gary Stimac, helped the company surpass the IBM Corporation in all personal computer sales categories, after many predicted that none could compete with the behemoth.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Compaq Portable&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In November 1982 Compaq announced their first product, the Compaq Portable, a portable IBM PC compatible personal computer. It was released in March 1983 at $2995, considerably more affordable than the Canadian Hyperion. The Compaq Portable was one of the progenitors of today's laptop; some called it a "suitcase computer" for its size and the look of its case. It was the second IBM PC compatible, being capable of running all software that would run on an IBM PC. It was a commercial success, selling 53,000 units in its first year. The Compaq Portable was the first in the range of the Compaq Portable series. Compaq was able to market a legal IBM clone because IBM mostly used "off the shelf" parts for their PC. Furthermore, Microsoft had kept the right to license the operating system to other computer manufacturers. The only part which had to be duplicated was the BIOS, which Compaq did legally by using clean room reverse engineering for $1 million.[3][4][5] Phoenix Technologies were the first to follow their lead, but soon "clone BIOSes" were available from several vendors.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Deskpro&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On June 28th 1984 Compaq Released the Compaq Deskpro, a 16-bit desktop computer using an Intel 8086 microprocessor running at 7.14 MHz. It was considerably faster than an IBM PC and was, like the Compaq Portable, also capable of running IBM software. This was the first of the Compaq Deskpro line of computers.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Deskpro 386&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;When in 1986 Compaq introduced the first PC based on Intel's new 80386 microprocessor, the Compaq Deskpro 386,[6] they began a period of increasing performance leadership over IBM, who were not yet using this processor. An IBM machine eventually reached the market seven months later, but by that time Compaq was the 386 supplier of choice and IBM had lost its image of technical leadership.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Systempro&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;This technical leadership and the rivalry with IBM was emphasised when the Systempro server was launched in late 1989 - this was a true server product with standard support for a second CPU and RAID, but also the first product to feature the EISA bus which was designed in reaction to IBM's MCA (MicroChannel Architecture).&lt;br /&gt;1990s&lt;br /&gt;&lt;br /&gt;At the same time as they began to dominate the server market, in the early 1990s Compaq entered the retail computer market with the Presario, and was one of the first manufacturers in the mid-1990s to market a sub-$1000 PC. In order to maintain the prices it wanted, Compaq became the first first-tier computer manufacturer to utilize CPUs from AMD and Cyrix. The price war resulting from Compaq's actions ultimately drove numerous competitors, most notably IBM and Packard Bell, from this market.&lt;br /&gt;&lt;br /&gt;In 1997, Compaq bought Tandem Computers, known for their NonStop server line. This acquisition instantly gave Compaq a presence in the higher end business computing market. In 1998, Compaq acquired Digital Equipment Corporation, the leading company in the previous generation of minicomputers during the 1970s and early 1980s. This acquisition made Compaq, at the time, the second largest computer maker in the world in terms of revenue. Unfortunately for the company, CEO Eckhard Pfeiffer, who engineered both mergers, had little vision for what the combined companies should do, or indeed how the three dramatically different cultures could work as a single entity, and Compaq struggled as a result. Pfeiffer was forced out as CEO in 1999 in a coup led by board chairman Ben Rosen and was succeeded by Michael Capellas, who had been serving as Compaq's CIO. Capellas was able to restore some of the luster lost in the latter part of the Pfeiffer era, but the company still struggled against lower-cost competitors such as Dell.&lt;br /&gt;&lt;br /&gt;During November 1999, Compaq began to work with Microsoft to create the first in a line of small-scale, web-based computer systems called MSN Companions.[7]&lt;br /&gt;&lt;br /&gt;In 1998, Compaq also signed new sales and equipment alliance with NaviSite. Under the pact, Compaq agreed to promote and sell NaviSite Web hosting services. In return, NaviSite took Compaq as a preferred provider for its storage and Intel-based servers.&lt;br /&gt;Merger with HP&lt;br /&gt;&lt;br /&gt;In 2001, Compaq engaged in a merger with Hewlett-Packard. Numerous large HP shareholders, including William Hewlett, publicly opposed the deal, which resulted in an impassioned public proxy battle between those for and against the deal.&lt;br /&gt;&lt;br /&gt;The merger was approved only after the narrowest of margins, and allegations of vote buying (primarily involving an alleged last-second back-room deal with Deutsche Bank) haunted the new company.&lt;br /&gt;&lt;br /&gt;It was subsequently disclosed that HP had retained Deutsche Bank's investment banking division in January 2002 to assist in the merger. HP had agreed to pay Deutsche Bank $1 million guaranteed, and another $1 million contingent upon approval of the merger. On August 19, 2003, the United States Securities and Exchange Commission charged Deutsche Bank with failing to disclose a material conflict of interest in its voting of client proxies for the merger and imposed a civil penalty of $750,000. Deutsche Bank consented without admitting or denying the findings.[8]&lt;br /&gt;&lt;br /&gt;Before the merger, Compaq's ticker symbol was CPQ. This was melded with Hewlett-Packard's previous symbol (HWP) to create the current symbol of HPQ.&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;Post merger&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Capellas left the company after serving less than a year as President of HP to become CEO of MCI Worldcom, leading it to be purchased by Verizon. Carly Fiorina, the Chairman and CEO of HP, added Capellas's responsibilities to her own.&lt;br /&gt;&lt;br /&gt;Fiorina helmed HP for nearly three years after Capellas left. HP laid off thousands of former Compaq, DEC, HP, and Tandem employees,[9] [10] its stock price generally declined and profits did not perk up. Though the merger initially made it the number one PC maker, it soon lost the lead and further market share to Dell. In addition, the merging of stagnant Compaq with HP's lucrative printing and imaging division was criticized as that overshadowed the latter's profitability. In February 2005, the Board of Directors ousted Fiorina. Former Compaq CEO Capellas was mentioned by some as a potential successor, but several months afterwards, Mark Hurd was hired as CEO.&lt;br /&gt;&lt;br /&gt;In late 2005, HPQ seemed to find its feet under the new leadership of Mark Hurd. At this same time Dell seemed to be faltering and HPQ took back the #1 sales position. Hurd separated the PC division from the imaging and printing division. HP's PC segment has since been reinvigorated and now generates more revenue than the traditionally more profitable printers[citation needed].&lt;br /&gt;&lt;br /&gt;Most Compaq products have been re-branded with the HP nameplate, such as the company's market leading ProLiant server line, while the Compaq brand remains on only some consumer-orientated products, notably Compaq Presario PCs. HP's business computers line was discontinued in favour of the Compaq Evo line, which was rebranded HP Compaq. HP's Jornada PDAs were replaced by Compaq iPAQ PDAs, which were renamed HP iPAQ.&lt;br /&gt;&lt;br /&gt;In May 2007, HP in a press release announced a new logo for their Compaq Division to be placed on the new model Compaq Presarios.[11]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Sponsorship&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Compaq sponsored Queens Park Rangers Football Club from 1994 to 1996, during their most recent two seasons as a Premier League club. Compaq sponsored Bradford Bulls Rugby League club from 1996 to 1998.&lt;br /&gt;&lt;br /&gt;Compaq also sponsored the Williams team in Formula One.&lt;br /&gt;&lt;br /&gt;Two sports stadiums were named after the company:&lt;br /&gt;&lt;br /&gt;   * The Compaq Center, of Houston, Texas, formerly The Summit, until its sports teams moved to the Toyota Center. The building became the new home of Lakewood Church, one of the largest Protestant congregations in the United States.&lt;br /&gt;   * The Compaq Center at San Jose, later renamed the HP Pavilion when HP purchased Compaq.&lt;br /&gt;&lt;br /&gt;Compaq was the original sponsor for Walt Disney World's Mission: SPACE attraction before they were purchased by HP.[12]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Competitors&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP Compaq competes against other computer manufacturers including Dell, Acer, Lenovo and Toshiba among others. Originally the company competed against IBM, making affordable IBM PC compatibles often cheaper and faster than the IBM alternative. Lenovo, which purchased IBM's personal computer business in 2005, is a new competitor, especially in the People's Republic of China where it was founded.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-5992277615341009388?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/5992277615341009388/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=5992277615341009388' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5992277615341009388'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5992277615341009388'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/compaq.html' title='Compaq'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/SWXirXk-HbI/AAAAAAAAADg/6e4kv4uJlbU/s72-c/compaq.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-5673338635572500589</id><published>2009-01-08T16:15:00.004+05:00</published><updated>2009-01-08T16:21:05.223+05:00</updated><title type='text'>Hewlett-Packard</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Hewlett-Packard"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 150px; height: 95px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SWXhioHz-6I/AAAAAAAAADY/GgO0MppWnT4/s320/HP.png" alt="" id="BLOGGER_PHOTO_ID_5288881322418502562" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Hewlett-Packard Company (NYSE: HPQ), commonly referred to as HP, is a technology corporation headquartered in Palo Alto, California, United States. HP is the largest technology company in the world and operates in nearly every country. HP specializes in developing and manufacturing computing, storage, and networking hardware, software and services. Major product lines include personal computing devices, enterprise servers, related storage devices, as well as a diverse range of printers and other imaging products. Other product lines, including electronic test equipment and systems, medical electronic equipment, solid state components and instrumentation for chemical analysis were spun off as Agilent Technologies in 1999.&lt;br /&gt;&lt;br /&gt;HP markets its products to households, small to medium size businesses and enterprises both directly, via online distribution, consumer-electronics and office-supply retailers, software partners and major technology vendors.&lt;br /&gt;&lt;br /&gt;HP posted US $91.7 billion in annual revenue in 2006[3] compared to US$91.4 billion for IBM, making it the world's largest technology vendor in terms of sales. In 2007 the revenue was $104 billion,[4] making HP the first IT company in history to report revenues exceeding $100 billion.[5]&lt;br /&gt;&lt;br /&gt;HP is the largest worldwide seller of personal computers, surpassing rival Dell, according to market research firms Gartner and IDC reported in January 2008;[6] the gap between HP and Dell widened substantially at the end of 2007, with HP taking a near 3.9% market share lead. HP is also the 5th largest software company in the world.[7]&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Company history&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Founding&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;William (Bill) Hewlett and David (Dave) Packard both graduated in electrical engineering from Stanford University in 1935. The company originated in a garage in nearby Palo Alto during a fellowship they had with a past professor, Frederick Terman at Stanford during the Great Depression. Terman was considered a mentor to them in forming Hewlett-Packard.[8]&lt;br /&gt;&lt;br /&gt;The partnership was formalized on , 1939 with an investment of US$538.[9] Hewlett and Packard tossed a coin to decide whether the company they founded would be called Hewlett-Packard or Packard-Hewlett. Packard won the coin toss but named their electronics manufacturing enterprise the "Hewlett-Packard Company". HP incorporated on August 18, 1947, and went public on November 6, 1957.&lt;br /&gt;&lt;br /&gt;Of the many projects they worked on, their very first financially successful product was a precision audio oscillator, the Model HP200A. Their innovation was the use of a small light bulb as a temperature dependent resistor in a critical portion of the circuit. This allowed them to sell the Model 200A for $54.40 when competitors were selling less stable oscillators for over $200. The Model 200 series of generators continued until at least 1972 as the 200AB, still tube-based but improved in design through the years. At 33 years, it was perhaps the longest-selling basic electronic design of all time.&lt;br /&gt;&lt;br /&gt;One of the company's earliest customers was The Walt Disney Company, which bought eight Model 200B oscillators (at $71.50 each) for use in certifying the Fantasound surround sound systems installed in theaters for the movie Fantasia.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Early years&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The company was originally rather unfocused, working on a wide range of electronic products for industry and even agriculture. Eventually they elected to focus on high-quality electronic test and measurement equipment.&lt;br /&gt;&lt;br /&gt;From the 1940s until well into the 1990s the company focused on making electronic test equipment. A distinguishing feature was pushing the limits of measurement range and accuracy: many HP instruments were more sensitive, accurate, and precise than other comparable equipment[citation needed]. Amongst instruments produced were signal generators, voltmeters, oscilloscopes, frequency counters, thermometers, time standards, wave analyzers, and many others.&lt;br /&gt;&lt;br /&gt;Following the pattern set by the company's first product, the 200A, test instruments were labelled with three to five digits followed by the letter "A". Improved versions went to suffixes "B" through "E". As the product range grew wider HP started using product designators starting with a letter for accessories, supplies, software, and components.&lt;br /&gt;The 1960s&lt;br /&gt;&lt;br /&gt;HP is recognized as the symbolic founder of Silicon Valley, although it did not actively investigate semiconductor devices until a few years after the "Traitorous Eight" had abandoned William Shockley to create Fairchild Semiconductor in 1957. Hewlett-Packard's HP Associates division, established around 1960, developed semiconductor devices primarily for internal use. Instruments and calculators were some of the products using these devices.&lt;br /&gt;&lt;br /&gt;HP partnered in the 1960s with Sony and the Yokogawa Electric companies in Japan to develop several high-quality products. The products were not a huge success, as there were high costs in building HP-looking products in Japan. HP and Yokogawa formed a joint venture (Yokogawa-Hewlett-Packard) in 1963 to market HP products in Japan.[10] HP bought Yokogawa Electric's share of Hewlett-Packard Japan in 1999.[11]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;First company logo.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP spun off a small company, Dynec, to specialize in digital equipment. The name was picked so that the HP logo "hp" could be turned upside down to be the logo "dy" of the new company. Eventually Dynec changed to Dymec, then was folded back into HP.&lt;br /&gt;&lt;br /&gt;HP experimented with using Digital Equipment Corporation minicomputers with its instruments. But after deciding that it would be easier to buy another small design team than deal with DEC, HP entered the computer market in 1966 with the HP 2100 / HP 1000 series of minicomputers. A simple accumulator-based design, with registers arranged somewhat similarly to the Intel x86 architecture still used today, it was produced for 20 years, in spite of several attempts to replace it. It was a forerunner of the HP 9800 and HP 250 series of desktop and business computers.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;The&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;1970s&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The HP 3000 was an advanced stack-based design for a business computing server, later redesigned with RISC technology, that has only recently been retired from the market. The HP 2640 series of smart and intelligent terminals introduced forms-based interfaces to ASCII terminals, and also introduced screen labeled function keys, now commonly used on gas pumps and bank ATMs. Although scoffed at in the formative days of computing, HP would eventually surpass even IBM as the world's largest technology vendor in sales.&lt;br /&gt;&lt;br /&gt;HP is identified by Wired magazine as the producer of the world's first marketed, mass-produced personal computer, in 1968, the Hewlett-Packard 9100A.[12] HP called it a desktop calculator because, as Bill Hewlett said, "If we had called it a computer, it would have been rejected by our customers' computer gurus because it didn't look like an IBM. We therefore decided to call it a calculator, and all such nonsense disappeared." An engineering triumph at the time, the logic circuit was produced without any integrated circuits; the assembly of the CPU having been entirely executed in discrete components. With CRT display, magnetic-card storage, and printer, the price was around $5000. The machine's keyboard was a cross between that of a scientific calculator and an adding machine. There was no alphabetical keyboard.&lt;br /&gt;&lt;br /&gt;Steve Wozniak, co-founder of Apple, originally designed the Apple I computer while working at HP and offered it to them under their right of first refusal to his work, but they did not take it up as the company wanted to stay in scientific, business, and industrial markets.&lt;br /&gt;&lt;br /&gt;The company earned global respect for a variety of products. They introduced the world's first handheld scientific electronic calculator in 1972 (the HP-35), the first handheld programmable in 1974 (the HP-65), the first alphanumeric, programmable, expandable in 1979 (the HP-41C), and the first symbolic and graphing calculator HP-28C. Like their scientific and business calculators, their oscilloscopes, logic analyzers, and other measurement instruments have a reputation for sturdiness and usability (the latter products are now part of spin-off Agilent's product line). The company's design philosophy in this period was summarized as "design for the guy at the next bench".&lt;br /&gt;&lt;br /&gt;The 98x5 series of technical desktop computers started in 1975 with the 9815, and the cheaper 80 series, again of technical computers, started in 1979 with the 85[1]. These machines used a version of the BASIC programming language which was available immediately after they were switched on, and used a proprietary magnetic tape for storage. HP computers were similar in capabilities to the much later IBM Personal Computer, although the limitations of available technology forced prices to be high.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;The 1980s&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In 1984, HP introduced both inkjet and laser printers for the desktop. Along with its scanner product line, these have later been developed into successful multifunction products, the most significant being single-unit printer/scanner/copier/fax machines. The print mechanisms in HP's tremendously popular LaserJet line of laser printers depend almost entirely on Canon's components (print engines), which in turn use technology developed by Xerox. HP develops the hardware, firmware, and software that convert data into dots for the mechanism to print.&lt;br /&gt;&lt;br /&gt;In 1987, the Palo Alto garage where Hewlett and Packard started their business was designated as a California State historical landmark.&lt;br /&gt;The 1990s&lt;br /&gt;&lt;br /&gt;In the 1990s, HP expanded their computer product line, which initially had been targeted at university, research, and business customers, to reach consumers.&lt;br /&gt;&lt;br /&gt;HP also grew through acquisitions, buying Apollo Computer in 1989 and Convex Computer in 1995.&lt;br /&gt;&lt;br /&gt;Later in the decade HP opened hpshopping.com as an independent subsidiary to sell online, direct to consumers; in 2005 the store was renamed "HP Home &amp;amp; Home Office Store."&lt;br /&gt;&lt;br /&gt;In 1999, all of the businesses not related to computers, storage, and imaging were spun off from HP to form Agilent. Agilent's spin-off was the largest initial public offering in the history of Silicon Valley. The spin-off created an $8 billion company with about 30,000 employees, manufacturing scientific instruments, semiconductors, optical networking devices, and electronic test equipment for telecom and wireless R&amp;amp;D and production.&lt;br /&gt;&lt;br /&gt;In July 1999, HP appointed Carly Fiorina as CEO. Fiorina was the first woman ever to serve as CEO of a company included in the Dow Jones Industrial Average. Carly served as CEO during the tech downtown of the turn of 2nd millenium. During her tenure, the market halved HP’s value commensurate with other tech companies at the time and the company incurred heavy job losses.[13] The HP Board of Directors asked Carly Fiorina to step down in 2005, and Fiorina resigned on February 9, 2005.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;2000 and beyond&lt;/span&gt;&lt;br /&gt;Compaq Merger. HP merged with Compaq in 2002. Compaq itself had bought Tandem Computers in 1997 (which had been started by ex-HP employees), and Digital Equipment Corporation in 1998. Following this strategy HP became a major player in desktops, laptops, and servers for many different markets. After the merger with Compaq, the new ticker symbol became "HPQ", a combination of the two previous symbols, "HWP" and "CPQ", to show the significance of the alliance. In 2006 HP outsourced its Enterprise support to countries with lower cost workers: the Spanish support (for Spain) moved to Slovakia, the German support moved to Bulgaria, English support moved to Costa Rica, etc.&lt;br /&gt;&lt;br /&gt;EDS purchase. On May 13, 2008, HP and Electronic Data Systems announced [14] that they have signed a definitive agreement under which HP will purchase EDS. On June 30, HP announced [15] that the waiting period under the Hart-Scott-Rodino Antitrust Improvements Act of 1976 had expired. "The transaction still requires EDS stockholder approval and regulatory clearance from the European Commission and other non-U.S. jurisdictions and is subject to the satisfaction or waiver of the other closing conditions specified in the merger agreement." The agreement was finalized on August 26, 2008 and it was publicly announced that EDS would be re-branded "EDS an HP company.”&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Technology and products&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP has successful lines of printers, scanners, digital cameras, calculators, PDAs, servers, workstation computers, and computers for home and small business use computers; many of the computers came from the 2002 merger with Compaq. HP today promotes itself as supplying not just hardware and software, but also a full range of services to design, implement and support IT infrastructure.&lt;br /&gt;&lt;br /&gt;The three business segments: Enterprise Storage and Servers (ESS), HP Services (HPS), and HP Software are structured beneath the broader Technology Solutions Group (TSG).&lt;br /&gt;Imaging and Printing Group (IPG)&lt;br /&gt;&lt;br /&gt;According to HP's 2005 U.S. SEC 10-K filing,[16] HP's Imaging and Printing Group is "the leading imaging and printing systems provider in the world for printer hardware, printing supplies and scanning devices, providing solutions across customer segments from individual consumers to small and medium businesses to large enterprises." This division is currently headed by Vyomesh Joshi.&lt;br /&gt;&lt;br /&gt;Products and technology associated with the Imaging and Printing Group include:&lt;br /&gt;&lt;br /&gt;   * Inkjet and LaserJet printers, consumables and related products&lt;br /&gt;   * Officejet all-in-one multifunction printer/scanner/faxes&lt;br /&gt;   * Large Format Printers&lt;br /&gt;   * Indigo Digital Press&lt;br /&gt;   * HP Web Jetadmin printer management software&lt;br /&gt;   * HP Output Management suite of software, including HP Output Server&lt;br /&gt;   * LightScribe optical recording technology that laser-etches labels on disks&lt;br /&gt;   * HP Photosmart digital cameras and photo printers&lt;br /&gt;   * HP SPaM Hosted within IPG, SPaM is an internal consulting group that supports all HP businesses on mission-critical strategic and operation decisions.&lt;br /&gt;&lt;br /&gt;On December 23, 2008, HP releases iPrint Photo for iPhone a free downloadable software application that allows to print 4" x 6" photos.[17]&lt;br /&gt;Personal Systems Group (PSG)&lt;br /&gt;&lt;br /&gt;HP's Personal Systems Group claims to be "one of the leading vendors of personal computers ("PCs") in the world based on unit volume shipped and annual revenue."[16]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Personal Systems Group products/technology include:&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Business PCs and accessories&lt;br /&gt;   * Consumer PCs and accessories including the HP Pavilion, Compaq Presario and VoodooPC series&lt;br /&gt;   * Workstations for Unix, Windows and Linux systems&lt;br /&gt;   * Handheld Computing including iPAQ Pocket PC handheld computing devices (from Compaq)&lt;br /&gt;   * Digital "Connected" Entertainment including HP MediaSmart TVs, HP MediaSmart Servers, HP MediaVaults, and DVD+RW drives. HP resold the Apple iPod until November 2005.[16]&lt;br /&gt;   * Home Storage Servers&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Technology Solutions Group (TSG)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;TSG incorporates Managed services, HP software and Enterprise Storage and Servers Group (ESS)&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;Enterprise Storage and Servers Group (ESS)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * HP ProLiant: entry line of x86 based servers (from Compaq)&lt;br /&gt;         o ProLiant BL: x86-based blade servers (from Compaq)&lt;br /&gt;   * Integrity: server line using the Itanium processor architecture running several operating systems including HP-UX and OpenVMS.&lt;br /&gt;         o Integrity BL: Itanium-based blade servers&lt;br /&gt;         o HP Integrity Superdome: line of high-end servers&lt;br /&gt;   * HP 9000: line of servers and workstations based on PA-RISC processors and running HP-UX&lt;br /&gt;         o HP 9000 Superdome: line of high-end servers&lt;br /&gt;   * AlphaServer: product line using the Alpha processor (from DEC) and running either:&lt;br /&gt;         o Tru64 operating system (from DEC)&lt;br /&gt;         o OpenVMS operating system (from DEC)&lt;br /&gt;   * NonStop: high-reliability Itanium-based architecture and operating system (from Tandem Computers)&lt;br /&gt;   * StorageWorks: product line (from Compaq), which includes business class and enterprise class data storage and protection products.[18]&lt;br /&gt;         o StorageWorks HP XP high-end storage arrays (from Hitachi)&lt;br /&gt;         o StorageWorks EVA mid-range storage arrays (from Compaq)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;HP Software&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * the OpenView family of management software&lt;br /&gt;&lt;br /&gt;With the major acquisitions of Peregrine and Mercury Interactive completed, HP has dropped the names OpenView, Peregrine and Mercury from its portfolio. The Business Technology Optimization (BTO)part of the software organization is now being referred to as HP Software &amp;amp; Solutions. The OpenCall branding still remains.&lt;br /&gt;&lt;br /&gt;   * HP Data Protector software&lt;br /&gt;   * HP Integrated Archive Platform&lt;br /&gt;   * HP Database Archiving&lt;br /&gt;   * HP Email Archiving for Microsoft Exchange&lt;br /&gt;   * HP Email Archiving for IBM Lotus Domino&lt;br /&gt;   * HP File Archiving&lt;br /&gt;   * HP Medical Image Archiving&lt;br /&gt;   * HP TRIM software (previously TOWER Software)&lt;br /&gt;&lt;br /&gt;   * HP-UX operating system developed since 1983&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Office of Strategy and Technology&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP's Office of Strategy and Technology [19], under Executive Vice President Shane Robison:&lt;br /&gt;&lt;br /&gt;   * Steers the company's $3.6 billion research and development investment — including HP Labs.&lt;br /&gt;   * Fosters the development of the company's global technical community.&lt;br /&gt;   * Leads the company's strategy and corporate development efforts — including mergers, acquisitions, divestitures, intellectual property licensing, venture capital partnerships, and the ProCurve Networking Business Unit. [20]&lt;br /&gt;   * Performs worldwide corporate marketing activities — including external and internal communications, brand marketing, customer intelligence, and corporate affairs.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;HP Labs&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP Labs (or HP Laboratories) is the research arm of HP. Founded in 1966, HP Labs' function is to deliver new technologies and to create business opportunities that go beyond HP's current strategies. An example of recent HP Lab technology includes the Memory spot chip.&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;HP IdeaLab&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP IdeaLab www.hp.com/idealab provides a web forum on early-state innovations to encourage open feedback from consumers and the development community. [21]&lt;br /&gt;ProCurve Networking Business Unit&lt;br /&gt;HPs networking business unit, ProCurve, are responsible for the family of network switches, wireless access points, and routers.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Environmental record&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In 1998, the United States Environmental Protection Agency‎ sought a $2.5 million penalty against Hewlett Packard for violations against the Substance Control Act.[23] The PA EPA alleged that the company had not filed a Pre-Manufacturing Notice (PMN) before it began manufacturing and exporting chemicals. Without filing these PMNs, the EPA cannot conduct risk analysis of new chemicals.&lt;br /&gt;&lt;br /&gt;In 2002, Scorecard.org ranked Hewlett Packard facilities in the top 10-20 percentile for total environmental releases and top 30-40 percentile for air releases of recognized developmental toxicants.[24] It also showed that HPs factory in Puerto Rico released 246lbs of air released TRI pollutants, and had a total of 483,136lbs of production related wastes.[24]&lt;br /&gt;&lt;br /&gt;In July 2007, the company announced that it had met its target, set in 2004, to recycle 1 billion pounds of electronics and toner and ink cartridges.[25] It has set a new goal of recycling a further 2 billion pounds of hardware by the end of 2010. In 2006, the company recovered 187 million pounds of electronics, 73 percent more than its closest competitor&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;HP Certified Professionals&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Hewlett-Packard's Certified Professional (HP-CP) program is organised by job roles. Within each role, there are certification levels. It was developed to confirm the technical skills, sales competencies and knowledge that is required to propose and deploy, service and support technology and solutions sold by HP. HP-CP is intended for customers, resellers, and HP employees.&lt;br /&gt;Partnerships&lt;br /&gt;&lt;br /&gt;HP contributes to free software projects such as the Linux operating system. Some HP employees, such as Linux CTO and former Debian Project Leader Bdale Garbee, actively contribute and have Open Source job responsibilities. Many others participate in the Open Source community as volunteers. HP is also known in the (GNU/) Linux community for releasing drivers for most of their printers under the GNU GPL. [26]&lt;br /&gt;&lt;br /&gt;Hewlett-Packard also continues Compaq's extensive relationship with Microsoft and uses technology from most major software and hardware vendors.&lt;br /&gt;&lt;br /&gt;Until November 2005, HP offered a re-branded version of the Apple iPod.[16]&lt;br /&gt;&lt;br /&gt;HP partners with many application software companies, for example SAP AG.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Sponsorships&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;HP has many sponsorships. One well known sponsorship is of Walt Disney World's Epcot Park's Mission: SPACE. Others can be found on Hewlett-Packard's website [2]. From 1995 to 1999 they were the shirt sponsor of English Premier League club Tottenham Hotspur. They also sponsored the BMW Williams Formula 1 team. Hewlett-Packard also has the naming rights arrangement for the HP Pavilion at San Jose, home of the San Jose Sharks NHL hockey team.&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;Product legacy&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Agilent Technologies, not HP, retains the direct product legacy of the original company founded in 1939. Agilent's current portfolio of electronic instruments are descended from HP's very earliest products. HP entered the computer business only after its instrumentation competencies were well-established.&lt;br /&gt;&lt;br /&gt;After the acquisition of Compaq in 2002, HP has maintained the "Compaq Presario" brand on low-end home desktops and laptops, the "HP Compaq" brand on business desktops and laptops, and the "HP ProLiant" brand on Intel-architecture servers. (The "HP Pavilion" brand is used on home entertainment laptops and all home desktops.)[27]&lt;br /&gt;&lt;br /&gt;HP uses DEC's "StorageWorks" brand on storage systems; Tandem's "NonStop" servers are now branded as "HP Integrity NonStop"&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Culture&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The founders, known to friends and employees alike as Bill and Dave, developed a unique management style that has come to be known as the HP Way. In Bill's words, the HP Way is "a core ideology ... [which] includes a deep respect for the individual, a dedication to affordable quality and reliability, a commitment to community responsibility, and a view that the company exists to make technical contributions for the advancement and welfare of humanity."[29]&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;&lt;br /&gt;Controversy&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;HP pretexting scandal&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On September 5, 2006 Newsweek published a story[30] revealing that the chairwoman of HP, Patricia Dunn, had hired a team of independent electronic-security experts that later spied on HP board members and several journalists, to determine the source of a leak of confidential details regarding HP's long-term strategy in January, 2006. The independent, third party company used a technique known as pretexting to obtain call records of HP board members and nine journalists, including reporters for CNET, the New York Times and the Wall Street Journal. Dunn has claimed she did not know the methods the investigators used to determine the source of the leak.[31] Board member George Keyworth was ultimately outed as the source.&lt;br /&gt;&lt;br /&gt;On September 12, 2006 Keyworth resigned from the board and HP announced that Mark Hurd, the current CEO and president, would replace Dunn as Chairman after the HP board meeting on January 18, 2007.&lt;br /&gt;&lt;br /&gt;On September 22, 2006 Hurd announced at a special press briefing that Ms. Dunn had resigned effective immediately from both the Chairmanship role and as a director of the Board;&lt;br /&gt;&lt;br /&gt;On September 28, 2006, Ann Baskins, HP's general counsel (head attorney) resigned[32] hours before she was to appear as a witness at which she would later invoke the Fifth Amendment to "not be held to answer for a capital, or otherwise infamous crime."[33]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Investigation by the government&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On October 4, 2006, California Attorney General Bill Lockyer filed criminal charges and arrest warrants against Kevin Hunsaker, Dunn and three outside investigators.[34] On September 11, 2006, the United States House Committee on Energy and Commerce wrote to Patricia Dunn stating that they have been conducting an investigation on Internet-based data brokers who allegedly use "lies, fraud and deception" to acquire personal information, and allow anyone who paid a "modest fee" to acquire "itemized incoming and outgoing call logs", and when had learned about HP's use of pretexting through their September 6 SEC filing and through their own inquiry of HP's Nominating and Governance Committee, stating they are "troubled" by the information, "particularly that it involves HP—one of America's corporate icons."&lt;br /&gt;&lt;br /&gt;The committee requested, under Rules X and XI of the United States House of Representatives, information from HP by September 18, 2006:&lt;br /&gt;&lt;br /&gt;At the September 28, 2006 hearing, Dunn and Hurd[35] both testified extensively about the investigation. Dunn testified that until June or July 2006, she did not realize that "pretexting" could involve identity misrepresentation. Dunn repeatedly insisted that she had believed that personal phone records could be obtained through legal methods.&lt;br /&gt;&lt;br /&gt;Other witnesses refused to answer questions due to the ongoing criminal investigations.[33]&lt;br /&gt;Perceived impact on the company's operations&lt;br /&gt;&lt;br /&gt;Despite the intense media coverage, investors continue to show faith in the company. As of October 23, the price of the company's stock had increased from $36.50 to $39.87 per share.[36]&lt;br /&gt;&lt;br /&gt;On October 8, 2006 Reuters ran a story describing pretexting used by Hewlett-Packard and other companies.[37]&lt;br /&gt;&lt;br /&gt;On October 12, 2006 HP announced the appointment of Jon Hoak as vice president and chief ethics and compliance officer. Hoak served as senior vice president and general counsel for NCR from 1993 until May 2006.[38]&lt;br /&gt;&lt;br /&gt;On December 7, 2006 HP paid $14.5 Million to settle civil charges brought by the California Attorney General.[39]&lt;br /&gt;&lt;br /&gt;In December 2006, two members of Congress requested that HP provide more information regarding CEO Mark Hurd's sale of $1.4 million of stock options on August 25, the same day he was questioned by attorneys investigating the pretexting scandal.[40] Mark Hurd explained that the August trade was part of his normal investment strategy to diversify assets and was made during a regularly scheduled trading window for senior officers and directors.[citation needed] Additionally, Hurd assured the Subcommittee that the August trade had nothing to do with his interview by attorneys investigating the leak investigation and that he had initiated the trade before any such request had been made to him.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Traceable e-mail&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Fred Adler of HP revealed before a U.S. Congressional Inquiry that HP used an e-mail tracking service to trace a leak in an e-mail sent to CNET reporter Dawn Kawamoto.[41] The e-mail contained a Web bug. Adler stated that HP considers Web bugs to be a legitimate investigative tool, and has used them a number of times.[42] The California attorney general's office has said that this practice was not part of the Pretexting charges.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Management&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Chairman of the Board, CEO, and President: Mark Hurd (March 29, 2005 - current, appointed Chairman September 22, 2006)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Co-founder: David Packard (President: 1947; Chairman: 1964–1969; Chairman 1971—1993)&lt;br /&gt;   * Co-founder: William Hewlett (Vice President: 1947; Executive Vice President: 1957; President: 1964; CEO: 1969; Chairman of the Executive Committee 1978; Vice Chairman 1983—1987)&lt;br /&gt;   * CEO: John A. Young (1978—October 31, 1992)&lt;br /&gt;   * CEO: Lewis Platt (November 1, 1992—July 18, 1999; Chairman 1993—July 18, 1999)&lt;br /&gt;   * Chairman: Richard Hackborn (January, 2000—September 22, 2000; Lead Independent Director September 22, 2006—)&lt;br /&gt;   * CEO: Carly Fiorina (July 19, 1999—February 9, 2005; Chairwoman September 22, 2000—February 9, 2005)&lt;br /&gt;   * Interim CEO: Robert Wayman (February 9, 2005—March 28, 2005)&lt;br /&gt;   * Chairwoman: Patricia C. Dunn (February 9, 2005—September 22, 2006).&lt;br /&gt;   * CEO: Mark Hurd (CEO: April 1, 2005—; Chairman: September 22, 2006—)&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-5673338635572500589?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/5673338635572500589/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=5673338635572500589' title='1 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5673338635572500589'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5673338635572500589'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/hewlett-packard.html' title='Hewlett-Packard'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SWXhioHz-6I/AAAAAAAAADY/GgO0MppWnT4/s72-c/HP.png' height='72' width='72'/><thr:total>1</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3710346372569899969</id><published>2009-01-03T13:22:00.003+05:00</published><updated>2009-01-03T13:24:46.543+05:00</updated><title type='text'>AMD Graphics Product Group</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/AMD_Graphics_Product_Group"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 130px; height: 87px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/SV8grO0539I/AAAAAAAAADQ/V43KZSi4eP4/s320/ATI.png" alt="" id="BLOGGER_PHOTO_ID_5286980414642708434" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;AMD Graphics Product Group is a major designer and supplier of graphics processing units, motherboard chipsets, and video display cards. In 2006, the company was acquired by Advanced Micro Devices (AMD), although the ATI brand was retained for graphics cards. ATI was a fabless semiconductor company conducting in-house research and development and outsourcing the manufacturing and assembly of its products. Its main competitor was NVIDIA in the graphics and handheld market. The flagship product, the Radeon series of graphics cards, directly competes with NVIDIA's GeForce. The two companies' dominance of the market forced other manufacturers into niche roles.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The company was founded as Array Technologies Incorporated in 1985 by immigrants Kwok Yuen Ho[1] of Guangzhou, and Benny Lau and Lee Ka Lau of Hong Kong.[2] Working primarily in the OEM field, it produced integrated graphics cards for large PC manufacturers like IBM and Commodore. By 1987, it had grown into an independent graphics card retailer, introducing EGA Wonder and VGA Wonder graphic card product lines under its brand that year.[3] In May 1991, the company released Mach8, its first product able to process graphics without the CPU. Mach32 debuted in 1992 and offered improved memory bandwidth and GUI acceleration performance. ATI Technologies Inc. went public in 1993 with stock listed at NASDAQ and Toronto Stock Exchange.&lt;br /&gt;&lt;br /&gt;In 1994, the Mach 64 accelerator debuted, powering the Graphics Xpression and Graphics Pro Turbo. It offered hardware support for YUV-to-RGB color space conversion in addition to hardware zoom, early techniques of hardware-based video acceleration.&lt;br /&gt;&lt;br /&gt;ATI introduced its first combination of 2D and 3D accelerator under the name 3D Rage. This chip was based on the Mach 64 but it featured elemental 3D acceleration. The ATI Rage line powered almost the entire range of ATI graphics products. In particular, the Rage Pro was one of the first viable 2D-plus-3D alternatives to 3Dfx's 3D-only Voodoo chipset. 3D acceleration in the Rage line advanced from the basic functionality within the initial 3D Rage to a more advanced DirectX 6.0 accelerator in the 1999 Rage 128.&lt;br /&gt;&lt;br /&gt;The All-in-Wonder product line introduced in 1996 was the first combination of integrated graphics chip with TV tuner card and the first chip that enabled to display computer graphics on a TV set.[4] The cards featured 3D acceleration powered by ATI's second generation 3D Rage II, 64-bit 2D performance, TV-quality video acceleration, analog video capture, TV tuner functionality, flicker-free TV-out and stereo TV audio reception.&lt;br /&gt;&lt;br /&gt;ATI made an entrance into the mobile computing sector by introducing 3D-graphics acceleration to laptops in 1996. The Mobility product line had to meet requirements different from desktop PC, such as minimized power usage, reduced heat output, TMDS output capabilities for laptop screens, and maximized integration. In 1997, ATI acquired Tseng Labs's graphics assets, which included 40 engineers.&lt;br /&gt;&lt;br /&gt;The Radeon line of graphics products was unveiled in 2000. The initial Radeon graphics processing unit was an all-new design with DirectX 7.0 3D acceleration, video acceleration, and 2D acceleration. Technology developed for a specific Radeon generation could be built in varying levels of features and performance in order to provide products suited for the entire market range. The range stretches from the high-end Radeon HD 3000/4000 series, which support DirectX 10.1 Unified shader model technology, to Mobility Radeon products for laptops, and to the budget series, such as Radeon X1300. Later generations expanded this to include flexibility for easy construction of both integrated and discrete parts from the same technology.[5]&lt;br /&gt;&lt;br /&gt;In 2000, ATI acquired ArtX, which engineered the Flipper graphics chip used in the Nintendo GameCube game console. They have also created a modified version of the chip (codenamed Hollywood) for the successor of the GameCube, the Wii. ATI was contracted by Microsoft to create the graphics core (codenamed Xenos) for the Xbox 360. Later in 2005, ATI acquired Terayon's Cable Modem Silicon Intellectual Property strengthening their lead in the consumer digital television market.[6] K. Y. Ho remained as Chairman of the Board until he retired in November 2005. Dave Orton replaced him as the President and CEO of the organization.&lt;br /&gt;&lt;br /&gt;On July 24, 2006, AMD and ATI announced a plan to merge together in a deal valued at $5.4 billion. The merger closed on October 25, 2006.[7] The acquisition consideration included over $2 billion financed from a loan and 56 million shares of AMD stock.[8] ATI retained its name, logos and trademarks. ATI's then CEO Dave Orton was made the Executive Vice President of Visual and Media Businesses.[9]&lt;br /&gt;&lt;br /&gt;It was reported that in December 2006 AMD/ATI, along with its main rival NVIDIA, received subpoenas from the United States Department of Justice regarding possible antitrust violations in the graphics card industry.[10]&lt;br /&gt;&lt;br /&gt;In July 2007, AMD announced the resignation of Dave Orton. ATI, a subsidiary of AMD, is called the Graphics Product Group (GPG) inside the company.[11] The top-level management of the Graphics Product Group consists of Rick Bergman, Senior Vice President and General Manager and Adrian Hartog, Senior Vice President and General Manager of Consumer Electronics Group. Both report to Héctor de Jesús Ruiz, CEO and Chairman of AMD.[12]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Products&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In addition to developing high-end GPUs (originally called a VPU, visual processing unit, by ATI) for PCs, ATI also designs embedded versions for laptops (Mobility Radeon), PDAs and mobile phones (Imageon), integrated motherboards (Radeon IGP), set-top boxes (Xilleon) and others.ATI promotes some of its products with the fictional "Ruby" female character, a "mercenary for hire."[13] Computer animated videos produced by RhinoFX about Ruby on a mission (being a sniper, saboteur, hacker and so on) are displayed at large technology shows such as CeBIT, CES.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Computer graphics chipsets&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Graphics Solution / "Small Wonder" - Series of 8-bit ISA cards with MDA, Hercules and CGA compatibility. Later versions added EGA support.&lt;br /&gt;   * EGA / VGA Wonder - IBM "EGA/VGA-compatible" display adapters (1987)&lt;br /&gt;   * Mach Series - Introduced ATI's first 2D GUI "Windows Accelerator". As the series evolved, GUI acceleration improved dramatically and early video acceleration appeared.&lt;br /&gt;   * Rage Series - ATI's first 2D and 3D accelerator chips. The series evolved from rudimentary 3D with 2D GUI acceleration and MPEG-1 capability, to a highly competitive Direct3D 6 accelerator with then "best-in-class" DVD (MPEG2) acceleration. The various chips were very popular with OEMs of the time. The Rage II was used in the first ATI All-In-Wonder multi-function video card, and more advanced All-In-Wonders based on Rage series GPUs followed. (1995–2004)&lt;br /&gt;         * Rage Mobility - Designed for use in low-power environments, such as notebooks. These chips were functionally similar to their desktop counterparts, but had additions such as advanced power management, LCD interfaces, and dual monitor functionality.&lt;br /&gt;&lt;br /&gt;   * Radeon Series - Launched in 2000, the Radeon line is ATI's brand for their consumer 3D accelerator add-in cards. The original Radeon DDR was ATI's first DirectX 7 3D accelerator, introducing their first hardware T&amp;amp;L engine. ATI often produced 'Pro' versions with higher clock speeds, and sometimes an extreme 'XT' version, and even more recently 'XT Platinum Edition (PE)' and 'XTX' versions. The Radeon series was the basis for many ATI All-In-Wonder boards.&lt;br /&gt;         o Mobility Radeon - A series of power-optimized versions of Radeon graphics chips for use in laptops. They introduced innovations such as modularized RAM chips, DVD (MPEG2) acceleration, notebook GPU card sockets, and "PowerPlay" power management technology.&lt;br /&gt;         o ATI CrossFire - This technology was ATI's response to NVIDIA's SLI platform. It allowed, by using a secondary video card and a dual PCI-E motherboard based on an ATI Crossfire-compatible chipset, the ability to combine the power of the two video cards to increase performance through a variety of different rendering options. There is an option for additional PCI-E video card plugging into the third PCI-E slot for gaming physics, or another option to do physics on the second video card.[14]&lt;br /&gt;   * FireGL - Launched in 2001, following ATI's acquisition of FireGL Graphics from Diamond Multimedia. Workstation CAD/CAM video card, based on the Radeon series.&lt;br /&gt;   * FireMV - For workstations, featuring multi-view, a technology for the need of multiple displays for workstations with 2D acceleration only, usually based on the low-end products of the Radeon series.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Personal computer platforms and chipsets&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * IGP 3x0, Mobility Radeon 7000 IGP - ATI's first chipsets. Included a DirectX 7-level 3D graphics processor.&lt;br /&gt;   * 9100 IGP - 2nd generation system chipset. IXP250 southbridge. It was notable for being ATI's first complete motherboard chipset, including an ATI-built southbridge. It included an updated DirectX 8.1 class graphics processor. [15]&lt;br /&gt;   * Xpress 200/200P - PCI Express-based Athlon 64 and Pentium 4 chipset. Supports SATA as well as integrated graphics with DirectX 9.0 support, the first integrated graphics chipset to do so.[16]&lt;br /&gt;   * Xpress 3200 - similar to Xpress 200, but designed for optimal CrossFire performance.&lt;br /&gt;         o AMD 580X CrossFire chipset - AMD edition of Xpress 3200 renamed, due to AMD acquisition of ATI.&lt;br /&gt;   * 690G, Xpress 1250 - for AMD and Intel platforms. Includes DirectX 9 graphics processor improved over Xpress 200 [17] and industry first native HDMI implementation on motherboards.&lt;br /&gt;   * AMD 700 chipset series - exclusively for AMD processors, this is a chipset family supporting Phenom processors and Quad FX enthusiast platform (790FX), enthusiast chipset (790X), IGP (790GX, 780G, 740G) and single graphics card variants (770, 740) aimed at mainstream and value computing systems available.&lt;br /&gt;&lt;br /&gt;In addition to the above chipset ATI has announced that a deal has been struck with CPU and Motherboard manufacturers as of 2005, particularly Asus and Intel, to create onboard 3D Graphics solutions for Intel's new range of motherboards that will be released with their range of Intel Pentium M-based desktop processors, the Intel Core and Intel Core 2 processors, the D101GGC and D101GGC2 chipset (codenamed "Grand County" [18]) based on the Radeon Xpress 200 chipset. However, high-end boards with integrated graphics processor (IGP) will still use Intel GMA integrated graphics processors. The deal with Intel was deemed to be officially ended with the purchase of ATI Technologies from AMD in July 2006, with Intel announcing SiS IGP chipset (D201GLY chipset, codenamed "Little Valley") for entry-level desktop platform, replacing the "Grand County" series chipsets.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Multimedia and Digital TV solutions&lt;/span&gt;&lt;br /&gt;   * All-In-Wonder series - A series of multimedia graphics cards which incorporating TV tuner and Radeon family graphics cards onto one add-in card, who, after being seemingly discontinued was relaunched as All-In-Wonder HD on June 26, 2008.&lt;br /&gt;   * TV tuners&lt;br /&gt;         o TV Wonder and HDTV Wonder - a chipset family providing TV reception of various analog TV and digital TV signals (PAL, NTSC, ATSC, DVB-T and so on) with first generation AVIVO technology, also supporting CableCARD, and Clear QAM technologies.&lt;br /&gt;         o Theatre - a family of QAM and VSB demodulators for the Digital Cable ready and ATSC environments.&lt;br /&gt;   * Xilleon - A 32-bit MIPS processor featuring hardware decoding of MPEG2, H.264 and VC-1 encoding and decoding.&lt;br /&gt;   * Remote Wonder, wireless remote control series for ATI multimedia products. Operates using radio frequency, away from mainstream implementations using infrared.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Console graphics solutions&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Flipper - The Nintendo GameCube contains a 3D accelerator developed by ArtX, Inc, a company acquired by ATI during the development of the GPU. Flipper is similar in capability to a Direct3D 7 accelerator chip. It consists of 4 rendering pipelines, with hardware T&amp;amp;L, and some limited pixel shader support. Innovatively the chip has 3 MiB of embedded 1T-SRAM for use as ultra-fast low-latency (6.2 ns) texture and framebuffer/Z-buffer storage allowing 10.4 GB/second bandwidth (extremely fast for the time). Flipper was designed by members of the Nintendo 64 Reality Coprocessor team who moved from SGI. The Flipper team went on to have a major hand in development of the Radeon 9700.&lt;br /&gt;   * Xenos - Microsoft's Xbox 360 video game console contains a custom graphics chip produced by ATI, known as "R500", "C1", or more often as Xenos. Some of these features include the embedded DRAM (eDRAM). The Xenos also features the “True Unified Shader Architecture” which dynamically loads and balances pixel and vertex processing amongst a bank of identically capable processing units. This differs greatly from past-generations PC graphics chips that have separate banks of processors designed for their individual task (vertex/fragment). Another feature presented in Xenos is the hardware surface tessellation to divide a surface into smaller triangles, similar to TruForm in terms of functionality, which is an advanced feature as it is not presented even in the most up-to-date DirectX 10 specification. The latest-generation Radeon R600 GPU core inherited most of the features presented in Xenos, except eDRAM.&lt;br /&gt;   * Hollywood - Successor to Flipper. Part of Nintendo's latest gaming console, Wii.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Handheld chipsets&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Imageon - System-on-a-chip (SoC) design introduced in 2002 to bring integrated 2D and 3D graphics to handhelds devices, cellphones and Tablet PCs. Current top-of-line product is the Imageon 2298 which includes DVD quality recording and playback, TV output, and supports up to a 12 megapixel camera, with another line of Imageon products, the 2300 series supporting OpenGL ES 1.1+ extensions. The Imageon line was rebranded under AMD, after AMD acquired ATI in Q3 2006, as AMD Imageon.&lt;br /&gt;   * Imageon TV - Announced in February 2006, allowing handhelds devices to receive digital broadcast TV (DVB-H) signals and enables watching TV programs on these devices, the chipset includes tuner, demodulator, decoder, and a full software stack, operates alongside the Imageon chip.&lt;br /&gt;   * Besides full products, ATI has also supplied 3D and 2D graphics components to other vendors, specifically the Qualcomm[19] MSM7000 series SoC chips of handheld and upcoming Freescale i. MX processors [20].&lt;br /&gt;   * ATI claimed in May 2006, that it had sold over 100 million[21] 'cell phone media co-processors,' significantly more than ATI's rival NVIDIA, and announced in February 2007 that the firm had shipped a total of 200 million of Imageon products since 2003 [22].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;High Performance Computing&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;AMD FireStream, originally ATI Firestream, and previously rebranded as AMD Stream Processor for a short period of time, utilizing the stream processing concept, together with Close to Metal (CTM) hardware interface.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;ATI graphics drivers&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;ATI currently provides proprietary drivers, called ATI Catalyst, for Microsoft Windows Vista, Windows XP, Mac OS X, and Linux. Linux users have the option of both the old proprietary (R200 and above) and new open source (R480 and below) drivers.&lt;br /&gt;&lt;br /&gt;In an interview with AMD official Hal Speed, it was suggested that AMD were strongly considering making at least the functional part of the ATI drivers open source.[23] However, at least until the merger with AMD was complete, ATI had no plans to release their drivers as open source code:&lt;br /&gt;&lt;br /&gt;   Proprietary, patented optimizations are part of the value we provide to our customers and we have no plans to release these drivers to open source. In addition, multimedia elements such as content protection must not, by their very nature, be allowed to go open source.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3710346372569899969?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3710346372569899969/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3710346372569899969' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3710346372569899969'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3710346372569899969'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/amd-graphics-product-group.html' title='AMD Graphics Product Group'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/SV8grO0539I/AAAAAAAAADQ/V43KZSi4eP4/s72-c/ATI.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8053012354759218704</id><published>2009-01-01T20:25:00.001+05:00</published><updated>2009-01-01T20:27:06.537+05:00</updated><title type='text'>GeForce</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Geforce"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 193px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SVzghHB2c-I/AAAAAAAAADI/UHfK3Vfxu8A/s320/GeForce.png" alt="" id="BLOGGER_PHOTO_ID_5286346922053235682" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;GeForce is a brand of PC graphics processor units (GPUs) designed by Nvidia. The first GeForce products were designed and marketed for the high-margin computer gamer market, but later the product's releases expanded the product line to cover all tiers of the graphics market, from low-end to high-end. As of 2008[update], there have been ten iterations of the design. Nvidia only designs the chips; manufacturing is outsourced. While several companies (notably, Intel) design low-end GPUs, only Nvidia's GeForce and ATI's Radeon series compete for the high-end GPU market.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Name origin&lt;/span&gt;&lt;br /&gt;The "GeForce" name originated from a contest held by Nvidia in early 1999. Called "Name That Chip", the contest called out to the public to name the successor to the RIVA TNT2 line of graphics boards. There were over 12,000 entries received and 7 winners received a RIVA TNT2 Ultra graphics board as a reward.[1][2]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Generations&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce 256&lt;/span&gt;&lt;br /&gt;   Launched on August 31, 1999, the GeForce 256 (NV10) was the first PC graphics chip with hardware transform, lighting, and shading although 3D games utilizing this feature did not appear until later. Initial GeForce 256 boards shipped with SDR SDRAM memory, and later boards shipped with faster DDR SDRAM memory.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce2&lt;/span&gt;&lt;br /&gt;   Launched in April 2000, the first GeForce2 (NV15) was another high-performance graphics chip. Nvidia moved to a twin texture processor per pipeline (4x2) design, doubling texture fillrate per clock compared to GeForce 256. Later, Nvidia released the GeForce2 MX (NV11), which offered performance similar to the GeForce 256 but at a fraction of the cost. The MX was a compelling value in the low/mid-range market segments and was popular with OEM PC manufacturers and users alike.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce3&lt;/span&gt;&lt;br /&gt;   Launched in February 2001, the GeForce3 (NV20) introduced DirectX 8.0 programmable pixel shaders to the GeForce family. It had good overall performance and shader support, making it popular with enthusiasts although it never hit the midrange price point. A derivative of the GeForce3, NV2A, was developed for the Microsoft Xbox game console.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce4&lt;/span&gt;&lt;br /&gt;   Launched in February 2002, the high-end GeForce4 Ti (NV25) was mostly a refinement to the GeForce3. The biggest advancements included enhancements to anti-aliasing capabilities, an improved memory controller, a second vertex shader, and a manufacturing process size reduction to increase clock speeds. Another "family member," the budget GeForce4 MX, was based on the GeForce2, with a few additions from the new GeForce4 Ti line. It targeted the value segment of the market and lacked pixel shaders.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce FX&lt;/span&gt;&lt;br /&gt;   Officially launched in November 2002, the GeForce FX (NV30) was a huge change in architecture compared to its predecessors. The GPU was designed not only to support the new Shader Model 2 specification but also to perform well on older DirectX 7 and 8 titles. However, initial models suffered from weak floating point shader performance and excessive heat which required two-slot cooling solutions. Products in this series carry the 5000 model number, as it is the fifth generation of the GeForce, though Nvidia marketed the cards as GeForce FX instead of GeForce 5 to show off "the dawn of cinematic rendering".&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce 6&lt;/span&gt;&lt;br /&gt;   Launched in April 2004, the GeForce 6 (NV40) added Shader Model 3.0 support to the GeForce family, while correcting the weak floating point shader performance of its predecessor. It also implemented high dynamic range imaging and introduced SLI (Scalable Link Interface) and PureVideo capability.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce 7&lt;/span&gt;&lt;br /&gt;   The 7th generation GeForce (G70/NV47) was launched in June 2005. The design was a refined version of GeForce 6, with the major improvements being a widened pipeline and an increase in clock speed. The GeForce 7 also offers new transparency supersampling and transparency multisampling anti-aliasing modes (TSAA and TMAA). These new anti-aliasing modes were later enabled for the GeForce 6 series as well.&lt;br /&gt;&lt;br /&gt;   A modified version of GeForce 7800GTX called the RSX 'Reality Synthesizer' is used as the main GPU in the PlayStation 3 from Sony.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce 8&lt;/span&gt;&lt;br /&gt;   Released on November 8, 2006, the 8th generation GeForce (G80 originally) was the first ever GPU to fully support DirectX 10. Built on a brand new architecture, it has a fully unified shader architecture. Originally just the 8800GTX, the GTS was released months into the product line's life, and it took nearly 6 months for mid-range and OEM/mainstream cards to be integrated into the 8-series. Die-shrinks and revisions to the G80 design, codenamed G92, were implemented into the 8 series with the 8800GS, the 8800GT, and 8800GTS-512.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce 9&lt;/span&gt;&lt;br /&gt;   The successor to the GeForce 8 series graphics products. The first product was released on February 21, 2008.[3] No concrete information about the products was known except officials claiming the next generation products having close to 1 TFLOPS performance while the GPU cores being made on 65 nm process, and reports about Nvidia downplaying the significance of DirectX 10.1.[4] So far, all 9-series designs, both currently-out and speculated, are simply revisions to existing late 8-series products. The 9600GT uses the G94 architecture, which differs from G92 architecture as the GPU has 64 stream processors.[5] The 9800GX2 uses two G92 GPU's, as used in later 8800 cards, in a dual PCB configuration while still only requiring a single PCI-Express 16x slot. The 9800GX2 utilises two separate 256-bit memory busses, one for each GPU and its respective 512MB of memory, which equates to an overall of 1GB of memory on the card (although the SLI configuration of the chips necessitates mirroring the frame buffer between the two chips, thus effectively having the memory performance of a 256-bit/512MB configuration). The later 9800GTX features a single G92 GPU, 256-bit data bus, and 512MB of GDDR3 memory[6].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;GeForce GT200&lt;/span&gt;&lt;br /&gt;   Based on the GT200 graphics processor consisting of 1.4 Billion transistors, the GTX 200 series launched at 0630 PDT on 16 June 2008.[7] The next generation of the GeForce series takes the card-naming scheme in a controversial new direction, by replacing the series number (such as 8800 for 8-series cards) with the GTX acronym (which used to go at the end of card names, denoting their 'rank' among other similar models), and then adding model-numbers such as 260 and 280 after that. The GTX could be interpreted as 10000, as the predecessor was 9000, and the Roman Numeral X is also representative of 10, which could translate as: GeForce 200 could also be read as 10200.[8] The series will feature the new GT200 core on a 65nm.[9] The first products will be GeForce GTX 260 and the more expensive GeForce GTX 280.[10]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Geforce GT300&lt;/span&gt;&lt;br /&gt;   "Nvidia is planning to launch its next-generation high-end GT300 GPU in the first quarter of 2009. The GPU will be manufactured under a 55nm process, according to sources at graphics card makers."[11]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Mobile GPUs&lt;/span&gt;&lt;br /&gt;Since the GeForce2, Nvidia has produced a number of graphics chipsets for notebook computers under the GeForce Go branding. Most of the features present in the desktop counterparts are present in the mobile ones. However these GPUs do not perform as well as their desktop counterpart. Nvidia later rebranded their mobile chipset for the GeForce 8 based GPUs the GeForce 8M series.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8053012354759218704?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8053012354759218704/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8053012354759218704' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8053012354759218704'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8053012354759218704'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/geforce.html' title='GeForce'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SVzghHB2c-I/AAAAAAAAADI/UHfK3Vfxu8A/s72-c/GeForce.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-6118949967660386830</id><published>2009-01-01T01:58:00.000+05:00</published><updated>2009-01-01T01:59:16.151+05:00</updated><title type='text'>AMD Fusion</title><content type='html'>AMD Fusion is the codename for a future next-generation microprocessor design and the product of the merger between AMD and ATI, combining general processor execution as well as 3D geometry processing and other functions of modern GPUs into a single package. AMD's merger with ATI closed on October 25, 2006. This technology is expected to debut in the second half of 2011 [1]; as a successor of the latest microarchitecture.&lt;br /&gt;&lt;br /&gt;Regarding future AMD microarchitectures beyond the introduction of the latest microarchitecture at mid-2007 and a refresh of the microarchitecture in late 2007 and early 2008; AMD executive VP Henri Richard's June 2006 interview with DigiTimes hints at the future processor development beyond that of the well documented one:&lt;br /&gt;&lt;br /&gt;“Q: What is your broad perspective on the development of AMD processor technology over the next three to four years?&lt;br /&gt;&lt;br /&gt;A: Well, as Dirk Meyer commented at our analysts meeting, we're not standing still. We've talked about the refresh of the current K8 architecture that will come in '07, with significant improvements in many different areas of the processor, including integer performance, floating point performance, memory bandwidth, interconnections and so on. You know that platform still has a lot of legs under it, but of course we're not standing still, and there's a next-generation core that's being worked on. I can't give you more details right now, but I think that what's important is that we're establishing clearly that this is a two-horse race. And as you would expect in a race, sometimes, when one horse is a little bit in front of the other, it reverses the situation. But what's important is that it is a race.”&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-6118949967660386830?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/6118949967660386830/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=6118949967660386830' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6118949967660386830'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6118949967660386830'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/amd-fusion.html' title='AMD Fusion'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8927200978671286699</id><published>2009-01-01T01:51:00.004+05:00</published><updated>2009-01-01T01:54:47.486+05:00</updated><title type='text'>Opteron</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Opteron"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 235px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SVvcCNLIY6I/AAAAAAAAADA/KRYoOsxhpS8/s320/Opteron.png" alt="" id="BLOGGER_PHOTO_ID_5286060518103606178" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Opteron is AMD's x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server market, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Technical description&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Two key capabilities&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Opteron combines two important capabilities in a single processor die:&lt;br /&gt;&lt;br /&gt;  1. native execution of legacy x86 32-bit applications without speed penalties&lt;br /&gt;  2. native execution of x86-64 64-bit applications&lt;br /&gt;&lt;br /&gt;The first capability is notable because at the time of Opteron's introduction, the only other 64-bit processor architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as all major RISC makers (Sun SPARC, DEC Alpha, HP PA-RISC, IBM POWER, SGI MIPS, etc.) have had 64-bit implementations for many years. In combining these two capabilities, however, the Opteron earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.&lt;br /&gt;&lt;br /&gt;The Opteron processor possesses an integrated DDR SDRAM / DDR2 SDRAM (Socket AM2/F) memory controller. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Multi-processor features&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing as instead of having one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron is a Non-Uniform Memory Access (NUMA) architecture. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.&lt;br /&gt;&lt;br /&gt;In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon[1]. This is primarily because adding an additional Opteron processor increases bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention for the shared bus causes computing efficiency to drop. Intel is migrating to a memory architecture similar to the Opteron's for the Core i7 family of processors.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Multi-core Opterons&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In May 2005, AMD introduced its first "Multi-Core" Opteron CPUs. At the time, AMD's use of the term "Multi-Core" in practice meant "dual-core"; each physical Opteron chip contained two separate processor cores. This effectively doubled the computing-power available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Because motherboard costs increase dramatically as the number of CPU sockets increase, multicore CPUs enable a system of higher performance to be built at lower cost.&lt;br /&gt;&lt;br /&gt;AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, the model 875 would be much faster than the model 252, but for single threaded applications the model 252 would perform faster.&lt;br /&gt;&lt;br /&gt;Second-Generation AMD Opteron processors are offered in three series: the 1000 Series (up to 1P/2-core), the 2000 Series (up to 2P/4-core), and the 8000 Series (4P/8-core to 8P/16-core). The 1000 Series is built on AMD's new Socket AM2. The 2000 Series and 8000 Series are built on AMD's new Socket F.&lt;br /&gt;&lt;br /&gt;AMD launched its Third-Generation Quad-core[2] Opteron chips on September 10th, 2007 [3] with hardware vendors to follow suit with servers in the following month. Based on a core design codenamed Barcelona, new power and thermal management techniques are planned for the chips. Existing dual core DDR2 based platforms will be upgradeable to quad core chips[4].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Socket 939&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;AMD has also released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. Except for the fact they have 1 MB L2 Cache (versus 512 KB for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64s, but are run at lower clockspeeds than the cores are capable of, making them more stable. They are also the only dual core Socket 939 processors still easily available now that the Athlon 64 X2s for that platform have been discontinued, though even these processors are becoming more and more difficult to find. [1]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Socket AM2&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Socket AM2 Opterons are available for servers that only have a single-chip setup. These chips may prove to be as successful as the previous generation socket 939 Opterons due to the Opteron's overclockability. Codenamed Santa Ana, rev. F dual core AM2 Opterons feature 2×1 MB L2 cache, unlike the majority of their Athlon 64 X2 cousins which feature 2x512 KB L2 cache.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Socket F&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Socket F (LGA 1207 contacts) is AMD’s second generation of Opteron socket. This socket support processors such as the Santa Rosa, Barcelona and Shanghai codenamed processors. The “Lidded Land Grid Array” socket adds support for DDR2 SDRAM and improved HyperTransport version 3 connectivity. Physically the socket and processor package are nearly identical, although not generally compatible with socket 1207 FX&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Micro-architecture update&lt;/span&gt;&lt;br /&gt;The Opteron line saw an update with the implementation of the AMD K10 microarchitecture. New processors, launched in the third quarter of 2007 (codename Barcelona), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.[5]&lt;br /&gt;&lt;br /&gt;In the meantime, AMD has also utilized a new scheme to characterize the power consumption of new processors under "average" daily usage, named Average CPU Power (ACP).&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Models&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;For Socket 940 and Socket 939 Opterons, each chip has a three-digit model number, in the form Opteron XYY. For Socket F and Socket AM2 Opterons, each chip has a four-digit model number, in the form Opteron XZYY. For all Opterons, the first digit (the X) specifies the number of CPUs on the target machine:&lt;br /&gt;&lt;br /&gt;   * 1 - Designed for uniprocessor systems&lt;br /&gt;   * 2 - Designed for dual-processor systems&lt;br /&gt;   * 8 - Designed for systems with 4 or 8 processors&lt;br /&gt;&lt;br /&gt;For Socket F and Socket AM2 Opterons, the second digit (the Z) represents the processor generation. Presently, only 2 (dual-core, DDR2) and 3 (quad-core, DDR2) are used.&lt;br /&gt;&lt;br /&gt;For all Opterons, the last two digits in the model number (the YY) indicate the clock frequency of a CPU, a higher number indicating a higher clock frequency. This speed indication is comparable to processors of the same generation if they have the same amount of cores, single-cores and dual-cores have different indications despite sometimes having the same clock frequency.&lt;br /&gt;&lt;br /&gt;The suffix HE or EE indicates a high-efficiency/energy-efficiency model having a lower TDP than a standard Opteron. The suffix SE indicates a top-of-the-line model having a higher TDP than a standard Opteron.&lt;br /&gt;&lt;br /&gt;A detailed list of Opteron microprocessors is here. The broad model families are:&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Opteron (90 nm SOI, DDR)&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Single-core — Venus (1yy), Troy (2yy), Athens (8yy)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Steppings: E4&lt;br /&gt;   * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64&lt;br /&gt;   * Socket 940, 800 MHz HyperTransport&lt;br /&gt;   * Socket 939/Socket 940, 1000 MHz HyperTransport&lt;br /&gt;   * Registered DDR SDRAM required for socket 940, ECC possible&lt;br /&gt;   * VCore: 1.35V - 1.4V&lt;br /&gt;   * Max power (TDP): 95W&lt;br /&gt;   * NX Bit&lt;br /&gt;   * 64-bit segment limit checks for VMware-style binary-translation virtualization.&lt;br /&gt;   * Optimized Power Management (OPM)&lt;br /&gt;   * First Release: February 14, 2005&lt;br /&gt;   * Clockrate: 1600 - 3000 MHz (x42 - x56)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-core — Denmark (1yy), Italy (2yy), Egypt (8yy)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Steppings: E1, E6&lt;br /&gt;   * First Release: Spring 2005&lt;br /&gt;   * Clockrate: 1600–2800 MHz (x60, x65, x70, x75, x80, x85, x90)&lt;br /&gt;   * ...&lt;br /&gt;   * Socket 939/Socket 940, 1000 MHz HyperTransport&lt;br /&gt;   * ...&lt;br /&gt;   * NX bit&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Opteron (90 nm SOI, DDR2)&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Dual-core — Santa Ana (12yy), Santa Rosa (22yy, 82yy)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Steppings: F2, F3&lt;br /&gt;   * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 2*1024 KB, fullspeed&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64&lt;br /&gt;   * Socket F, ??? MHz HyperTransport - Opteron 2yy, 8yy&lt;br /&gt;   * Socket AM2, ??? MHz HyperTransport - Opteron 1yy&lt;br /&gt;   * VCore: 1.35 V&lt;br /&gt;   * Max Power (TDP): 95W&lt;br /&gt;   * NX Bit&lt;br /&gt;   * AMD-V Virtualization&lt;br /&gt;   * Optimized Power Management (OPM)&lt;br /&gt;   * First Release: ?????? 2006&lt;br /&gt;   * Clockrate: 1800–3200 MHz (xx10, xx12, xx14, xx16, xx18, xx20, xx20, xx22, xx24)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Opteron (65 nm SOI)&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Quad-core — Barcelona (23yy, 83yy), Budapest (13yy)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Steppings: BA, B3&lt;br /&gt;   * L1-Cache: 64 + 64 KB (Data + Instructions) per core&lt;br /&gt;   * L2-Cache: 512 KB, fullspeed per core&lt;br /&gt;   * L3-Cache: 2048 KB, shared&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, SSE4a&lt;br /&gt;   * Socket F, Socket AM2+, HyperTransport 3.0 (1.6 GHz-2.0 GHz)&lt;br /&gt;   * Registered DDR2 SDRAM required, ECC possible&lt;br /&gt;   * VCore: ?&lt;br /&gt;   * Max Power (TDP): ?&lt;br /&gt;   * NX Bit&lt;br /&gt;   * AMD-V Virtualization&lt;br /&gt;   * Split power plane dynamic power management&lt;br /&gt;   * VCore: 1.2 V&lt;br /&gt;   * First Release: September 10, 2007&lt;br /&gt;   * Clockrate: 1700–2500 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Opteron (45 nm SOI)&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Quad-core — Shanghai&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;This is AMD's recently-announced 45 nm Opteron processor. Advantages over current Opteron processors include:&lt;br /&gt;&lt;br /&gt;   * L3-Cache: 6 MB, shared&lt;br /&gt;   * Clockrate: up to 2700 MHz&lt;br /&gt;   * HyperTransport 3.0&lt;br /&gt;   * 20% reduction in idle power consumption[3]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Supercomputers&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;On the November 2007 TOP500 list, 15.8% of the world's 500 fastest known supercomputer installations were AMD64 Opteron-based systems (down from 22.6% on 11/06), while 64.4% were Intel ia32e/EM64T/Intel 64 Xeon-based.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Supercomputers based &lt;/span&gt;&lt;br /&gt;&lt;br /&gt;on Opteron mentioned in the top 10 fastest supercomputers in the world:&lt;br /&gt;&lt;br /&gt;   * #2: Oak Ridge National Laboratory, USA. Jaguar - Cray XT5. AMD64 Opteron Quad Core 2300 MHz (9.2 GFlops/unit). Cray Inc. 150,152 total cores. Rpeak: 1381.400 TFlop.&lt;br /&gt;   * #6: Sandia National Laboratories, USA. Red Storm - Sandia/ Cray Red Storm, AMD64 Opteron Dual Core 2400 MHz. Cray Inc. 26,569 total cores. Rpeak: 127.531 TeraFlops.&lt;br /&gt;   * #9: NERSC/LBNL, USA. Franklin - Cray XT4. AMD64 Opteron Dual Core 2600 MHz. Cray Inc. 19,320 total cores. Rpeak: 100.464 TFlop.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Future&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Future Opteron processors will include codenamed Istanbul products in early 2009, later in 1H 2009- 2H 2010 the lineup will be replaced with codenamed six-core Sao Paolo and twelve-core Magny-Cours products manufactured using the MCM technique, utilizing Socket G34. Further, the server line of processors will incorporate the newly announced Bulldozer core with native 4 cores or more configurations on 32 nm process, each supporting SSE5 aimed at better HPC and cryptographic computations. Currently,[when?] Bulldozer-based products are expected to be released in 2011.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8927200978671286699?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8927200978671286699/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8927200978671286699' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8927200978671286699'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8927200978671286699'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2009/01/opteron.html' title='Opteron'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SVvcCNLIY6I/AAAAAAAAADA/KRYoOsxhpS8/s72-c/Opteron.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4794507475590249981</id><published>2008-12-28T13:25:00.004+05:00</published><updated>2008-12-29T21:57:23.631+05:00</updated><title type='text'>Turion 64 X2</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Turion_64_X2"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 180px; height: 202px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SVc4dPi0-uI/AAAAAAAAAC4/kAnCHFLWgFQ/s320/Turion+64+x2.png" alt="" id="BLOGGER_PHOTO_ID_5284754762782538466" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2 was launched on May 17, 2006[1], after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features.&lt;br /&gt;&lt;br /&gt;AMD first produced the Turion 64 X2 on IBM's 90 nm Silicon on insulator (SOI) process (cores with the Taylor codename). As of May 2007, they have switched to a 65 nm Silicon-Germanium stressed process[citation needed], which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65 nm processes[citation needed]. The earlier 90 nm devices were codenamed Taylor and Trinidad, while the newer 65 nm cores have codename Tyler.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Cores&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Taylor &amp;amp; Trinidad (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;  * Dual AMD64 core&lt;br /&gt;  * L1 cache: 64 + 64 KiB (data + instructions) per core&lt;br /&gt;  * L2 cache: 256 KiB (Taylor) or 512 KiB (Trinidad) per core, fullspeed&lt;br /&gt;  * Memory controller: dual channel DDR2-667 MHz&lt;br /&gt;  * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V&lt;br /&gt;  * Socket S1, HyperTransport (800 MHz, 1600 MT/s, 10.7 GB/s CPU-RAM + 6.4 GB/s CPU-I/O transfer rate)[1]&lt;br /&gt;  * Power consumption (TDP): 31, 33, 35 watt max&lt;br /&gt;  * First release: May 17, 2006&lt;br /&gt;  * Clock rate: 1600, 1800, 2000, 2200 MHz&lt;br /&gt;        o 31W TDP:&lt;br /&gt;              + TL-50: 1600 MHz (256 KiB L2-Cache per core)&lt;br /&gt;              + TL-52: 1600 MHz (512 KiB L2-Cache per core)&lt;br /&gt;        o 33W TDP:&lt;br /&gt;              + TL-56: 1800 MHz (512 KiB L2-Cache per core)&lt;br /&gt;        o 35W TDP:&lt;br /&gt;              + TL-60: 2000 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TL-64: 2200 MHz (512 KiB L2-Cache per core)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Tyler (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;  * Dual AMD64 core&lt;br /&gt;  * L1 cache: 64 + 64 KiB (data + instructions) per core&lt;br /&gt;  * L2 cache: 512 KiB per core, fullspeed&lt;br /&gt;  * Memory controller: dual channel DDR2-800 MHz (12.8 GB/s full-duplex CPU/RAM bandwidth)&lt;br /&gt;  * 100 MHz granularity (Dynamic P-state Transitions)&lt;br /&gt;  * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit, AMD-V&lt;br /&gt;  * Socket S1, HyperTransport (800 MHz / 1600 MT/s)&lt;br /&gt;  * Power consumption (TDP): 31, 35 watt max.&lt;br /&gt;  * First release: 2007&lt;br /&gt;  * Clock rate: 1700, 1800, 1900, 2000, 2200, 2300, 2400 MHz&lt;br /&gt;        o 31W TDP:&lt;br /&gt;              + TK-53 1700 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks&lt;br /&gt;              + TK-55 1800 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks&lt;br /&gt;              + TL-56 1800 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TK-57 1900 MHz (256 KiB L2-Cache per core) - ※Athlon 64 X2 Dual-Core for Notebooks&lt;br /&gt;              + TL-58 1900 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TL-60 2000 MHz (512 KiB L2-Cache per core)&lt;br /&gt;        o 35W TDP:&lt;br /&gt;              + TL-62 2100 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TL-64 2200 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TL-66 2300 MHz (512 KiB L2-Cache per core)&lt;br /&gt;              + TL-68 2400 MHz (512 KiB L2-Cache per core)&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Turion X2&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Lion (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;  * Dual AMD64 core&lt;br /&gt;  * L1 cache: 64 + 64 KiB (data + instructions) per core&lt;br /&gt;  * L2 cache: 512 KiB per core, fullspeed&lt;br /&gt;  * Memory controller: dual channel DDR2-800 MHz&lt;br /&gt;  * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V&lt;br /&gt;  * Socket S1, HyperTransport (1800 MHz, 3600 MT/s, 12.8 GB/s CPU-RAM + 14.4 GB/s CPU-I/O transfer rate)&lt;br /&gt;  * Power consumption (TDP): 31 watt max&lt;br /&gt;  * First release: June 4, 2008&lt;br /&gt;  * Clock rate: 2000 MHz&lt;br /&gt;        o 31W TDP:&lt;br /&gt;              + RM-70: 2000 MHz&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4794507475590249981?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4794507475590249981/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4794507475590249981' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4794507475590249981'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4794507475590249981'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/turion-64-x2.html' title='Turion 64 X2'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SVc4dPi0-uI/AAAAAAAAAC4/kAnCHFLWgFQ/s72-c/Turion+64+x2.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8307506842944970747</id><published>2008-12-28T13:22:00.002+05:00</published><updated>2008-12-29T21:56:09.594+05:00</updated><title type='text'>Turion 64</title><content type='html'>Turion 64 is the brand name AMD applies to its 64-bit low-consumption (mobile) processors codenamed K8L.[1] The Turion 64 and Turion 64 X2 processors compete with Intel's mobile processors, initially the Pentium M and currently the Intel Core and Intel Core 2 processors.&lt;br /&gt;&lt;br /&gt;Earlier Turion 64 processors are compatible with AMD's Socket 754. The newer "Richmond" models are designed for AMD's Socket S1. They are equipped with 512 or 1024 KiB of L2 cache, a 64-bit single channel on-die memory controller, and an 800 MHz HyperTransport bus. Battery saving features, like PowerNow!, are central to the marketing and usefulness of these CPUs.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Features&lt;/span&gt;&lt;br /&gt;Turion 64 "Lancaster" (90 nm)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;All models support:&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * MMX&lt;br /&gt;   * SSE&lt;br /&gt;   * SSE2&lt;br /&gt;   * SSE3&lt;br /&gt;   * Enhanced 3DNow!&lt;br /&gt;   * NX bit&lt;br /&gt;   * AMD64 instruction set&lt;br /&gt;   * PowerNow!&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Turion 64 "Richmond" (90 nm)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The models support the same features available in Lancaster, plus AMD-V.&lt;br /&gt;Model naming methodology&lt;br /&gt;The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a performance rating (PR). The first letter is M for single core processors and T for dual core Turion 64 X2 processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (frugal power consumption). Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 consumes less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Cores&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Lancaster (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1 cache: 64 + 64 KiB (data + instructions)&lt;br /&gt;   * L2 cache: 512 or 1024 KiB, fullspeed&lt;br /&gt;   * MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit&lt;br /&gt;   * Socket 754, HyperTransport (800 MHz, HT800)&lt;br /&gt;   * VCore: 1.00 V - 1.45 V&lt;br /&gt;   * Power consumption (TDP): 25/35 watt max&lt;br /&gt;   * First release: March 10, 2005&lt;br /&gt;   * Clock rate: 1600, 1800, 2000, 2200, 2400 MHz&lt;br /&gt;     &lt;br /&gt; o 25W TDP:&lt;br /&gt;               + MT-28: 1600 MHz (512 KiB L2-Cache)&lt;br /&gt;               + MT-30: 1600 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + MT-32: 1800 MHz (512 KiB L2-Cache)&lt;br /&gt;               + MT-34: 1800 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + MT-37: 2000 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + MT-40: 2200 MHz (1024 KiB L2-Cache)&lt;br /&gt;         o 35W TDP:&lt;br /&gt;               + ML-28: 1600 MHz (512 KiB L2-Cache)&lt;br /&gt;               + ML-30: 1600 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + ML-32: 1800 MHz (512 KiB L2-Cache)&lt;br /&gt;               + ML-34: 1800 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + ML-37: 2000 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + ML-40: 2200 MHz (1024 KiB L2-Cache)&lt;br /&gt;               + ML-42: 2400 MHz (512 KiB L2-Cache)&lt;br /&gt;               + ML-44: 2400 MHz (1024 KiB L2-Cache)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Richmond (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1 cache: 64 + 64 KiB (data + instructions)&lt;br /&gt;   * L2 cache: 512 KiB, fullspeed&lt;br /&gt;   * MMX, Enhanced 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit&lt;br /&gt;   * Socket S1, HyperTransport (800 MHz, HT800)&lt;br /&gt;   * VCore: 1.00 V - 1.45 V&lt;br /&gt;   * Power consumption (TDP): 31 watt max&lt;br /&gt;   * First release: September 1, 2006&lt;br /&gt;   * Clock rate: 2000, 2200 MHz&lt;br /&gt;         o 31W TDP:&lt;br /&gt;               + MK-36: 2000 MHz (512 KiB L2-Cache)&lt;br /&gt;               + MK-38: 2200 MHz (512 KiB L2-Cache)&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8307506842944970747?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8307506842944970747/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8307506842944970747' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8307506842944970747'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8307506842944970747'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/turion-64.html' title='Turion 64'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-1530131590671833879</id><published>2008-12-28T13:18:00.001+05:00</published><updated>2008-12-28T13:20:42.556+05:00</updated><title type='text'>Phenom (processor)</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Phenom_%28processor%29"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 235px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SVc2kVjJjhI/AAAAAAAAACw/Ge1f0URiUt4/s320/Phenom.png" alt="" id="BLOGGER_PHOTO_ID_5284752685630328338" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Phenom (pronounced as IPA:/finɒm/, as in the word phenomenon) is the AMD desktop processor line based on the K10 (not "K10h") microarchitecture,[1] or Family 10h Processors, as AMD calls them. Triple-core versions (codenamed Toliman) belong to the Phenom 8000 series and quad cores (codenamed Agena) in the AMD Phenom X4 9000 series. AMD considers the quad core Phenoms to be the first "true" quad core design, as these processors are a monolithic multi-core design (all cores on the same piece of silicon wafer), unlike Intel's Core 2 Quad series which are a multi-chip module (MCM) design. The processors are on the Socket AM2+ platform.[2]&lt;br /&gt;&lt;br /&gt;AMD has launched several models of the Phenom processor in 2007/2008&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Change of model nomenclatures&lt;/span&gt;&lt;br /&gt;The model numbers of the new line of processors were changed from the PR system used in its predecessors, the AMD Athlon 64 processor family. The new model numbering scheme, for later released Athlon X2 processors, is a four digit model number with a different family indicator as the first number.[7] Energy Efficient products end with the letter “e” after the model number (example Phenom 9350e) and some Sempron processors use the LE prefix (example Sempron LE-1200), as follows:&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Translation Lookaside Buffer (TLB) Error&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Before Phenom's release[citation needed], a flaw was discovered in the translation lookaside buffer that could cause a system lock-up in rare circumstances. Phenom processors up to and including stepping "B2" and "BA" are affected by this bug. BIOS and software workarounds disable the TLB, and typically incur a performance penalty of at least 10%.[9] This penalty was not accounted for in pre-release previews of Phenom, hence the performance of early Phenoms delivered to customers is expected to be less than the preview benchmarks. "B3" stepping Phenom processors were released March 27, 2008 without the TLB bug and with "xx50" model numbers.[10]&lt;br /&gt;&lt;br /&gt;An AMD subsidiary has released a patch for the Linux Kernel,[11] which it said has received "minimal functional testing", to overcome this bug by software emulation of accessed- and dirty-bits causing little performance loss.&lt;br /&gt;Phenom II&lt;br /&gt;&lt;br /&gt;Phenom II is the updated brand name for AMD's 45nm multicore central processing units. Socket AM2+ version of Phenom II will be released in January 2009 while February will see Socket AM3 versions of the same along with 3 core processors [12].&lt;br /&gt;&lt;br /&gt;The Phenom II range of CPUs are the first series of AMD CPUs to eliminate the "cold bug" (A physical phenomenon which causes the processor to cease functioning below a certain temperature. This bug prevents the use of "extreme" cooling methods such as Dry Ice or Liquid Nitrogen). With the elimination of this cold bug, these CPUs are expected to overclock to much higher levels than any other AMD CPU range.[13][14]&lt;br /&gt;&lt;br /&gt;In a pre-release demonstration of the Phenom II's overclocking potential, Macci (a record breaking overclocker) used a Phenom II X4 940 and a Gigabyte MA790GP-DS4H with liquid nitrogen cooling to take the processor to a clock speed in excess of 5GHz[15].&lt;br /&gt;Cores&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Phenom X4&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Agena (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * Four AMD K10 cores&lt;br /&gt;    * L1 cache: 64 KB + 64 KB[16] (data + instructions) per core&lt;br /&gt;    * L2 cache: 512 KB per core, full-speed&lt;br /&gt;    * L3 cache: 2 MB shared between all cores&lt;br /&gt;    * Memory controller: dual channel DDR2-1066 MHz with unganging option&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V&lt;br /&gt;    * Socket AM2+, HyperTransport with 1600 to 2000 MHz&lt;br /&gt;    * Power consumption (TDP): 65, 95, 125 and 140 Watt&lt;br /&gt;    * First release&lt;br /&gt;          o November 19, 2007 (B2 Stepping)&lt;br /&gt;          o March 27, 2008 (B3 Stepping)&lt;br /&gt;    * Clock rate: 1800 to 2600 MHz&lt;br /&gt;    * Models: Phenom X4 9100e to 9950&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Phenom X3&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Toliman (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * Three AMD K10 cores&lt;br /&gt;    * L1 cache: 64 KB + 64 KB (data + instructions) per core&lt;br /&gt;    * L2 cache: 512 KB per core, full-speed&lt;br /&gt;    * L3 cache: 2 MB shared between all cores&lt;br /&gt;    * Memory controller: dual channel DDR2-1066 MHz with unganging option&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, SSE4a, AMD64, Cool'n'Quiet, NX bit, AMD-V&lt;br /&gt;    * Socket AM2+, HyperTransport with 1600 to 1800 MHz&lt;br /&gt;    * Power consumption (TDP): 65 and 95 Watt&lt;br /&gt;    * First release&lt;br /&gt;          o March 27, 2008 (B2 Stepping)&lt;br /&gt;          o April 23, 2008 (B3 Stepping)&lt;br /&gt;    * Clock rate: 2100 to 2500 MHz&lt;br /&gt;    * Models: Phenom X3 8250e to 8850&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Future models&lt;/span&gt;&lt;br /&gt;Starting in the second half of 2008, AMD is expected to launch a series of 45 nm processors [17]. As of October 2007, only the codenames are known to the public. They are Deneb FX for Phenom FX, Deneb for quad-core processors, Heka for triple-core Phenom processor and Regor for Athlon X2. These processors are expected to be available in late 2008 to early 2009, with the support of DDR3 memory and are expected to have larger shared L3 cache (6 MBytes) as well as the implementation of Socket AM3 for single-processor systems, Socket F+ for dual-processor Quad FX platform[18].&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-1530131590671833879?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/1530131590671833879/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=1530131590671833879' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1530131590671833879'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1530131590671833879'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/phenom-processor.html' title='Phenom (processor)'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SVc2kVjJjhI/AAAAAAAAACw/Ge1f0URiUt4/s72-c/Phenom.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4220091447178646423</id><published>2008-12-25T00:59:00.004+05:00</published><updated>2008-12-25T01:02:25.597+05:00</updated><title type='text'>Athlon 64 X2</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Athlon_64_X2"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 150px; height: 169px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SVKVPoLPGdI/AAAAAAAAACo/yelm-YUJrP4/s320/amd+athlon+x2.png" alt="" id="BLOGGER_PHOTO_ID_5283449408574134738" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. It is essentially a processor consisting of two Athlon 64 cores joined together on one die with additional control logic. The cores share one dual-channel memory controller, are based on the E-stepping model of Athlon 64 and, depending on the model, have either 512 or 1024 KiB of L2 Cache per core. The Athlon 64 X2 is capable of decoding SSE3 instructions (except those few specific to Intel's architecture), so it can run and benefit from software optimizations that were previously only supported by Intel chips. This enhancement is not unique to the X2, and is also available in the Venice and San Diego single core Athlon 64s.&lt;br /&gt;&lt;br /&gt;In June 2007, AMD released low-voltage variants of their low-end 65 nm Athlon 64 X2, named "Athlon X2".[1] The Athlon X2 processors feature reduced TDP of 45 W.[2]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Multithreading&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The main benefit of dual-core processors like the X2 is their ability to process more software threads at the same time. The ability of processors to execute multiple threads simultaneously is called thread-level parallelism (TLP). By placing two cores on the same die, the X2 effectively doubles the TLP over a single-core Athlon 64 of the same speed. The need for TLP processing capability is dependent on the situation to a great degree, and certain situations benefit from it far more than others. Certain programs are currently only written with one thread, and are therefore unable to utilize the processing power of the second core.&lt;br /&gt;&lt;br /&gt;Programs often written with multiple threads and capable of utilizing dual-cores include many music and video encoding applications, and especially professional rendering programs. High TLP applications currently correspond to server/workstation situations more than the typical desktop. These applications can realize almost twice the performance of a single-core Athlon 64 of the same specifications. Multi-tasking also runs a sizable number of threads; intense multi-tasking scenarios have actually shown improvements of considerably more than two times [2]. This is primarily due to the excessive overhead caused by constantly switching threads, and could potentially be improved by adjustments to operating system scheduling code.&lt;br /&gt;&lt;br /&gt;In the consumer segment of the market as well, the X2 improves upon the performance of the original Athlon 64, especially for multi-threaded software applications. The overall increase in performance of the entry level Athlon 64 X2 chip (the Athlon 64 X2 3800+) over the single-core Athlon 64 3800+ chip is almost 10%. The spread between the latter and the Athlon 64 X2 5000+ is almost 40% [3]. One can interpret from these numbers that the majority of applications (at least in the benchmark test) are still largely single thread-dominated, hence the absence of a larger gap between the two 3800+ processors. As software programmers begin to take advantage of multi-core processing, the spread between single- and multi-core processors will increase.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Manufacturing costs&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Having two cores, the Athlon 64 X2 has an increased number of transistors. The 1-MiB-L2-cache 90 nm Athlon 64 X2 processor is 219 mm² in size with 243 million transistors [3] whereas its 1-MiB-L2-cache 90 nm Athlon 64 counterpart is 103.1 mm² and has 164 million transistors [4]. The 65 nm Athlon 64 X2 with only 512 KiB L2 per Core reduced this to 118 mm² with 221 million transistors compared to the 65 nm Athlon 64 with 77.2 mm² and 122 million transistors. As a result, a larger area of silicon must be defect free. These size requirements necessitate a more complex fabrication process, which further adds to the production of fewer functional processors per single silicon wafer. This lower yield makes the X2 more expensive to produce than the single-core processor.&lt;br /&gt;&lt;br /&gt;In the middle of June 2006 AMD stated that they would no longer make any non-FX Athlon 64 or Athlon 64 X2 models with 1-MiB L2 caches [4]. This led to only a small production number of the Socket-AM2 Athlon 64 X2 with 1 MiB L2 cache per core, known as 4000+, 4400+, 4800+, and 5200+. The Athlon 64 X2 with 512 KiB per core, known as 3800+, 4200+, 4600+, and 5000+, were produced in far greater numbers. The introduction of the F3 stepping then saw several models with 1 MiB L2 cache per core as production refinements resulted in an increased yield.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Manufacturing costs&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Change of model nomenclatures&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The model numbers of the new line of processors was apparently changed from the PR system used in its predecessors, the Athlon 64 X2. The new model numbering scheme, for later released Athlon X2 processors, is a four digit model number with different family indicator as the first number [5], while Sempron remained using the LE prefix, as follows:&lt;br /&gt;CPU cores&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Athlon 64 X2&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Manchester (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Stepping: E4&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions), per core&lt;br /&gt;   * L2-Cache: 256, 512 KiB fullspeed, per core&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;   * Socket 939, HyperTransport (1000 MHz, HT1000)&lt;br /&gt;   * VCore: 1.35 V - 1.4 V&lt;br /&gt;   * Power Consumption (TDP): 89 Watt&lt;br /&gt;   * First Release: 1 August 2005&lt;br /&gt;   * Clockrate: 2000 - 2400 MHz&lt;br /&gt;         o 256 KiB L2-Cache:&lt;br /&gt;               + 3600+: 2000 MHz&lt;br /&gt;         o 512 KiB L2-Cache:&lt;br /&gt;               + 3800+: 2000 MHz&lt;br /&gt;               + 4200+: 2200 MHz&lt;br /&gt;               + 4600+: 2400 MHz (110 Watt TDP)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Toledo (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Stepping: E6&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions), per core&lt;br /&gt;   * L2-Cache: 512 or 1024 KiB fullspeed, per core&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;   * Socket 939, HyperTransport (1000 MHz, HT1000)&lt;br /&gt;   * VCore: 1.35 V - 1.4 V&lt;br /&gt;   * Power Consumption (TDP):&lt;br /&gt;         o 89 Watt: 3800+, 4200+ and 4400+&lt;br /&gt;         o 110 Watt: 4400+, 4600+ and 4800+&lt;br /&gt;   * First Release: 21 April 2005&lt;br /&gt;   * Clockrate:: 2000 - 2400 MHz&lt;br /&gt;         o 512 KiB L2-Cache:&lt;br /&gt;               + 3800+: 2000 MHz&lt;br /&gt;               + 4200+: 2200 MHz&lt;br /&gt;               + 4600+: 2400 MHz&lt;br /&gt;         o 1024 KiB L2-Cache:&lt;br /&gt;               + 4400+: 2200 MHz&lt;br /&gt;               + 4800+: 2400 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Windsor (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Stepping: F2, F3&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions), per core&lt;br /&gt;   * L2-Cache: 256, 512 or 1024 KiB fullspeed, per core&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;   * Socket AM2, HyperTransport (1000 MHz, HT1000)&lt;br /&gt;   * VCore: 1.25 V - 1.35 V&lt;br /&gt;   * Power Consumption (TDP):&lt;br /&gt;         o 35 Watt (3800+ EE SFF)&lt;br /&gt;         o 65 Watt (3600+ to 5200+ EE)&lt;br /&gt;         o 89 Watt (3800+ to 6000+)&lt;br /&gt;         o 125 Watt (6000+ to 6400+)&lt;br /&gt;   * First Release: May 23, 2006&lt;br /&gt;   * Clockrate: 2000 MHz - 3200MHz&lt;br /&gt;         o 256 KiB L2-Cache:&lt;br /&gt;               + 3600+: 2000 MHz&lt;br /&gt;         o 512 KiB L2-Cache: (often mislabeled as Brisbane core)&lt;br /&gt;               + 3800+: 2000 MHz&lt;br /&gt;               + 4200+: 2200 MHz&lt;br /&gt;               + 4600+: 2400 MHz (F2&amp;amp;F3)&lt;br /&gt;               + 5000+: 2600 MHz (F2&amp;amp;F3)&lt;br /&gt;               + 5400+: 2800 MHz (F3)&lt;br /&gt;         o 1024 KiB L2-Cache:&lt;br /&gt;               + 4000+: 2000 MHz&lt;br /&gt;               + 4400+: 2200 MHz&lt;br /&gt;               + 4800+: 2400 MHz&lt;br /&gt;               + 5200+: 2600 MHz (F2&amp;amp;F3)&lt;br /&gt;               + 5600+: 2800 MHz (F3)&lt;br /&gt;               + 6000+: 3000 MHz (F3)&lt;br /&gt;               + 6400+: 3200 MHz (F3)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Brisbane (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Stepping: G1, G2&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions), per core&lt;br /&gt;   * L2-Cache: 512 KiB fullspeed, per core&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;   * Socket AM2, HyperTransport (1000 MHz, HT1000)&lt;br /&gt;   * VCore: 1.25 V - 1.35 V&lt;br /&gt;   * Die Size: 126 mm²&lt;br /&gt;   * Power Consumption (TDP): 65 Watt&lt;br /&gt;   * First Release: Dec 5, 2006&lt;br /&gt;   * Clockrate: 1900 MHz - 3100MHz&lt;br /&gt;         o 3600+: 1900 MHz&lt;br /&gt;         o 4000+: 2100 MHz&lt;br /&gt;         o 4200+: 2200 MHz (G1&amp;amp;G2)&lt;br /&gt;         o 4400+: 2300 MHz (G1&amp;amp;G2)&lt;br /&gt;         o 4600+: 2400 MHz (G2)&lt;br /&gt;         o 4800+: 2500 MHz (G1&amp;amp;G2)&lt;br /&gt;         o 5000+: 2600 MHz (G1&amp;amp;G2)&lt;br /&gt;         o 5200+: 2700 MHz (G1&amp;amp;G2)&lt;br /&gt;         o 5400+: 2800 MHz (G2)&lt;br /&gt;         o 5600+: 2900 MHz (G2)&lt;br /&gt;         o 5800+: 3000 MHz (G2)&lt;br /&gt;         o 6000+: 3100 MHz (G2)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Athlon X2&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;'64' was omitted from the name of the Brisbane 'BE' series; the 64-bit marketing campaign initiated by AMD became insignificant once essentially all consumer CPUs became 64-bit processors.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Brisbane (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * CPU-Stepping: G1, G2&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions), per core&lt;br /&gt;   * L2-Cache: 512 KiB fullspeed, per core&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;   * Socket AM2, HyperTransport (1000 MHz, HT1000)&lt;br /&gt;   * VCore: 1.15 V - 1.20 V&lt;br /&gt;   * Die Size: 118 mm²&lt;br /&gt;   * Power Consumption (TDP): 45 Watt&lt;br /&gt;   * First Release: June 1, 2007&lt;br /&gt;   * Clockrate: 1900 MHz - 2600 MHz&lt;br /&gt;         o BE-2300: 1900 MHz&lt;br /&gt;         o BE-2350: 2100 MHz (G1&amp;amp;G2)&lt;br /&gt;         o BE-2400: 2300 MHz (G2)&lt;br /&gt;         o 4050e: 2100 MHz (G2)&lt;br /&gt;         o 4450e: 2300 MHz (G2)&lt;br /&gt;         o 4850e: 2500 MHz (G2)&lt;br /&gt;         o 5050e: 2600 MHz (G2)&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4220091447178646423?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4220091447178646423/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4220091447178646423' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4220091447178646423'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4220091447178646423'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/athlon-64-x2.html' title='Athlon 64 X2'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SVKVPoLPGdI/AAAAAAAAACo/yelm-YUJrP4/s72-c/amd+athlon+x2.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-7714819589070829374</id><published>2008-12-22T23:20:00.002+05:00</published><updated>2008-12-22T23:24:08.423+05:00</updated><title type='text'>Athlon 64</title><content type='html'>The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003.[1] It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP.[2] The second processor (after the Opteron) to implement AMD64 architecture and the first 64-bit processor targeted at the average consumer,[3] it was AMD's primary consumer microprocessor, and competes primarily with Intel's Pentium 4, especially the "Prescott" and "Cedar Mill" core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers.[4] Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit x86 instructions.[5] Athlon 64s have been produced for Socket 754, Socket 939, Socket 940, and Socket AM2.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History&lt;/span&gt;&lt;br /&gt;The Athlon 64 was originally codenamed ClawHammer by AMD,[3] and was referred to as such internally and in press releases. The first Athlon 64 FX was based on the first Opteron core, SledgeHammer. Both cores, produced on a 130 nanometer process, were first introduced on September 23, 2003. The models first available were the FX-51, fitting Socket 940, and the 3200+, fitting Socket 754.[6] Like the Opteron, on which it was based, the Athlon FX-51 required buffered RAM, increasing the final cost of an upgrade.[7] The week of the Athlon 64's launch, Intel released the Pentium 4 Extreme Edition, a CPU designed to compete with the Athlon 64 FX.[8] The Extreme Edition was widely considered a marketing ploy to draw publicity away from AMD, and was quickly nicknamed among some circles the "Emergency Edition".[9] Despite a very strong demand for the chip, AMD was plagued by early manufacturing difficulties that made it difficult to deliver Athlon 64s in quantity. In the early months of the Athlon 64 lifespan, AMD could only produce one hundred thousand chips per month.[10] However, it was very competitive in terms of performance to the Pentium 4, with magazine PC World calling it the "fastest yet".[11] "Newcastle" was released soon after ClawHammer, with half the Level 2 cache.[12]&lt;br /&gt;&lt;br /&gt;On June 1, 2004, AMD released new versions of both the ClawHammer and Newcastle core revisions for the newly-introduced Socket 939, an altered Socket 940 without the need for buffered memory.[13] Socket 939 offered two main improvements over Socket 754: the memory controller was altered with dual-channel architecture,[14] doubling peak memory bandwidth, and the HyperTransport bus was increased in speed from 800 MHz to 1000 MHz.[15] Socket 939 also was introduced in the FX series in the form of the FX-55.[16] At the same time, AMD also began to ship the "Winchester" core, based on a 90 nanometer process.&lt;br /&gt;&lt;br /&gt;Core revisions "Venice" and "San Diego" succeeded all previous revisions on April 15, 2005. Venice, the lower-end part, was produced for both Sockets 754 and 939, and included 512 KB of L2 cache.[17] San Diego, the higher-end chip, was produced only for Socket 939 and doubled Venice's L2 cache to one MB.[18] Both were produced on the 90 nm fabrication process.[19] Both also included support for the SSE3 instruction set,[20] a new feature that had been included in the rival Pentium 4 since the release of the Prescott core in February 2004.[21] In addition, AMD overhauled the memory controller for this revision, resulting in performance improvements as well as support for newer DDR RAM.[22]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-core Athlon 64&lt;/span&gt;&lt;br /&gt;On April 21, 2005, less than a week after the release of Venice and San Diego, AMD announced its next addition to the Athlon 64 line, the Athlon 64 X2.[23] Released on May 31, 2005,[24] it also initially had two different core revisions available to the public, Manchester and Toledo, the only appreciable difference between them being the amount of L2 cache.[25] Both were released only for Socket 939.[26] A response to Intel's dual core Pentium D, the Athlon 64 X2 was received very well by reviewers and the general public, with a general consensus emerging that AMD's implementation of multi-core was superior to that of the Pentium D.[27][28] Some felt initially that the X2 would cause market confusion with regard to price points since the new processor was targeted at the same "enthusiast," US$350 and above market[29] already occupied by AMD's existing socket 939 Athlon 64s.[30] AMD's official breakdown of the chips placed the Athlon X2 aimed at a segment they called the "prosumer", along with digital media fans.[24] The Athlon 64 was targeted at the mainstream consumer, and the Athlon FX at gamers. The Sempron budget processor was targeted at value-conscious consumers.[31]&lt;br /&gt;DDR2&lt;br /&gt;&lt;br /&gt;The Athlon 64 had been maligned by some critics for some time because of its lack of support for DDR2 SDRAM, an emerging technology that had been adopted much earlier by Intel.[32] AMD's official position was that the CAS latency on DDR2 had not progressed to a point where it would be advantageous for the consumer to adopt it.[33] AMD finally remedied this gap with the "Orleans" core revision, the first Athlon 64 to fit Socket AM2, released on May 23, 2006.[34] "Windsor", an Athlon 64 X2 revision for Socket AM2, was released concurrently. Both Orleans and Windsor have either 512KB or 1MB of L2 cache per core.[35] The Athlon 64 FX-62 was also released concurrently on the Socket AM2 platform.[36] Socket AM2 also consumes less power than previous platforms, and supports AMD-V.[37]&lt;br /&gt;&lt;br /&gt;The memory controller used in all DDR2 SDRAM capable processors (Socket AM2), has extended column address range of 11 columns instead of conventional 10 columns, and the support of 16 KB page size, with at most 2048 individual entries supported. An OCZ unbuffered DDR2 kit, optimized for 64-bit operating systems, was released to exploit the functionality provided by the memory controller in socket AM2 processors, allowing the memory controller to stay longer on the same page, thus benefitting graphics intensive applications.[38]&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;Features&lt;/span&gt;&lt;br /&gt;There are four variants: Athlon 64, Athlon 64 FX, Mobile Athlon 64 (later renamed "Turion 64") and the dual-core Athlon 64 X2.[39] Common among the Athlon 64 line are a variety of instruction sets including MMX, 3DNow!, SSE, SSE2, and SSE3.[40] All Athlon 64s also support the NX bit, a security feature named "Enhanced Virus Protection" by AMD.[41] And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run 16 bit, 32 bit x86, and AMD64 code, through two different modes the processor can run in: "Legacy mode" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit operating system.[42] All Athlon 64 processors feature 128 Kilobytes of level 1 cache, and at least 512 KB of level 2 cache.[40]&lt;br /&gt;&lt;br /&gt;The Athlon 64 features an on-die memory controller,[5] a feature not previously seen on x86 CPUs. Not only does this mean the controller runs at the same clock rate as the CPU itself, it also means the electrical signals have a shorter physical distance to travel compared to the old northbridge interfaces.[43] The result is a significant reduction in latency (response time) for access requests to main memory.[44] The lower latency is often cited as one of the advantages of the Athlon 64's architecture over those of its competitors.[45]&lt;br /&gt;&lt;br /&gt;Translation Lookaside Buffers (TLBs) have also been enlarged (40 4k/2M/4M entries in L1 cache, 512 4k entries),[46] with reduced latencies and improved branch prediction, with four times the number of bimodal counters in the global history counter.[42] This and other architectural enhancements, especially as regards SSE implementation, improve instruction per cycle (IPC) performance over the previous Athlon XP generation.[42] To make this easier for consumers to understand, AMD has chosen to market the Athlon 64 using a PR (Performance Rating) system, where the numbers roughly map to Pentium 4 performance equivalents, rather than actual clock speed.[47]&lt;br /&gt;&lt;br /&gt;Athlon 64 also features CPU speed throttling technology branded Cool'n'Quiet, a feature similar to Intel's SpeedStep that can throttle the processor's clock speed back to facilitate lower power consumption and heat production.[48] When the user is running undemanding applications and the load on the processor is light, the processor's clock speed and voltage are reduced. This in turn reduces its peak power consumption (max TDP set at 89 W by AMD) to as low as 32 W (stepping C0, clock speed reduced to 800 MHz) or 22W (stepping CG, clock speed reduced to 1 GHz). The Athlon 64 also has an Integrated Heat Spreader (IHS) which prevents the CPU die from accidentally being damaged when mounting and unmounting cooling solutions. With prior AMD CPUs a CPU shim could be used by people worried about damaging the die.&lt;br /&gt;&lt;br /&gt;The No Execute bit (NX bit) supported by Windows Vista, Windows XP Service Pack 2,[49] Windows XP Professional x64 Edition, Windows Server 2003 x64 Edition, and Linux 2.6.8 and higher is also included, for improved protection from malicious buffer overflow security threats. Hardware-set permission levels make it much more difficult for malicious code to take control of the system. It is intended to make 64-bit computing a more secure environment.&lt;br /&gt;&lt;br /&gt;The Athlon 64 CPUs have been produced with 130 nm and 90 nm SOI process technologies.[50] All of the latest chips (Winchester, Venice and San Diego models) are on 90 nm. The Venice and San Diego models also incorporate dual stress liner technology[51] (an amalgam of strained silicon and 'squeezed silicon', the latter of which is not actually a technology) co-developed with IBM.[52]&lt;br /&gt;&lt;br /&gt;As the memory controller is integrated onto the CPU die, there is no FSB for the system memory to base its speed upon.[53] Instead, system memory speed is obtained by using the following formula (using the ceiling function):[54]&lt;br /&gt;&lt;br /&gt;In simpler terms, the memory is always running at a set fraction of the CPU speed, with the divisor being a whole number. A 'FSB' figure is still used to determine the CPU speed, but the RAM speed is no longer directly related to this 'FSB' figure (known otherwise as the LDT).&lt;br /&gt;&lt;br /&gt;To summarize, the Athlon 64 architecture features two buses from the CPU. One is the HT bus to the northbridge connecting the CPU to the chipset and device attachment bus (PCIe, AGP, PCI) and the other is the memory bus which connects the on-board memory controller to the bank of either DDR or DDR2 DRAM.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Athlon 64 FX&lt;/span&gt;&lt;br /&gt;The Athlon 64 FX is positioned as a hardware enthusiast product, marketed by AMD especially toward gamers.[55] Unlike the standard Athlon 64, all of the Athlon 64 FX processors have their multipliers completely unlocked.[56] The FX line is now dual-core, starting with the FX-60.[57] The FX always has the highest clock speed of all Athlons at its release.[58] From FX-70 onwards, the line of processors will also support dual-processor setup with NUMA, named AMD Quad FX platform.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Athlon 64 X2&lt;/span&gt;&lt;br /&gt;The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. In 2007, AMD released two final Athlon 64 X2 versions: the AMD Athlon 64 X2 6400+ and 5000+ Black Editions. Both processors feature an unlocked multiplier, which allows for a large range of overclocked settings. The 6400+ is based on a 90nm Windsor core (3.2GHz, 2x1MB L2, 125W TDP) while the 5000+ is based on a 65nm Brisbane core (2.6GHz, 2x512KB L2, 65W TDP). These Black Edition processors are available at retail, but AMD does not include heatsinks in the retail package.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Turion 64 (formerly Mobile Athlon 64)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Previously introduced as "Mobile Athlon 64", Turion 64 is now the brand name AMD applies to its 64-bit low-consumption (mobile) processors codenamed K8L.[59] The Turion 64 and Turion 64 X2 processors compete with Intel's mobile processors, initially the Pentium M and currently the Intel Core and Intel Core 2 processors.&lt;br /&gt;&lt;br /&gt;Earlier Turion 64 processors are compatible with AMD's Socket 754. The newer "Richmond" models are designed for AMD's Socket S1. They are equipped with 512 or 1024 KB of L2 cache, a 64-bit single channel on-die memory controller, and an 800 MHz HyperTransport bus. Battery saving features, like PowerNow!, are central to the marketing and usefulness of these CPUs.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Model naming methodology&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a PR rating. The first letter is M for single core processors and T for dual core Turion 64 X2 processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (frugal power consumption). Take for instance, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 consumes less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Sockets&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * Socket 754: The Athlon 64 value/budget line, 64-bit memory interface (Single-Channel)&lt;br /&gt;    * Socket 939: Athlon 64 performance line, Athlon 64 X2s, and newer Athlon 64 FXs, Opteron, 128-bit memory interface (Dual-channel)&lt;br /&gt;    * Socket 940: Opteron and old Athlon 64 FX, 128-bit memory interface - requires registered DDR memory&lt;br /&gt;    * Socket AM2: Athlon 64/Athlon 64 FX/Athlon 64 X2/Sempron, 940 Pins (Not compatible with Socket 940); the first AMD socket to use DDR2 SDRAM.&lt;br /&gt;    * Socket F: Opteron, 1207 Pins&lt;br /&gt;    * Socket F (1207 FX): Athlon 64 FX on AMD Quad FX platform, also compatible for dual-processor Opteron 2200 series[60]&lt;br /&gt;&lt;br /&gt;At the introduction of Athlon 64 in September 2003, only Socket 754 and Socket 940 (Opteron) were ready and available. The onboard memory controller was not capable of running unbuffered (non-registered) memory in dual-channel mode at the time of release; as a stopgap measure, they introduced the Athlon 64 on Socket 754, and brought out a non-multiprocessor version of the Opteron called the Athlon 64 FX, as a multiplier unlocked enthusiast part for Socket 940, comparable to Intel's Pentium 4 Extreme Edition for the high end market.&lt;br /&gt;&lt;br /&gt;In June 2004, AMD released Socket 939 as the mainstream Athlon 64 with dual-channel memory interface, leaving Socket 940 solely for the server market (Opterons), and relegating Socket 754 as a value/budget line, for Semprons and slower versions of the Athlon 64. Eventually Socket 754 replaced Socket A for Semprons.&lt;br /&gt;&lt;br /&gt;In May 2006, AMD released Socket AM2, which provided support for the DDR2 memory interface. Also, this marked the release of AMD-V.&lt;br /&gt;&lt;br /&gt;In August 2006, AMD released Socket F for Opteron server CPU which uses the LGA chip form factor.&lt;br /&gt;&lt;br /&gt;In November 2006, AMD released a specialized version of Socket F, called 1207 FX, for dual-socket, dual-core Athlon FX processors on the Quad FX platform. While Socket F Opterons already allowed for four processor cores, Quad FX allowed unbuffered RAM and expanded CPU/chipset configuration in the BIOS. Consequentially, Socket F and F 1207 FX are incompatible and require different processors, chipsets, and motherboards.&lt;br /&gt;Athlon 64 FX models&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;Sledgehammer (130 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: C0, CG&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, AMD64&lt;br /&gt;    * Socket 940, 800 MHz HyperTransport (HT800)&lt;br /&gt;    * Registered DDR-SDRAM required&lt;br /&gt;    * VCore: 1.50/1.55 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt max&lt;br /&gt;    * First Release: September 23, 2003&lt;br /&gt;    * Clockrate: 2200 MHz (FX-51, C0), 2400 MHz (FX-53, C0 and CG)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Clawhammer (130 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: CG&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, AMD64&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.50 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt (FX-55:104 Watt)&lt;br /&gt;    * First Release: June 1, 2004&lt;br /&gt;    * Clockrate: 2400 MHz (FX-53), 2600 MHz (FX-55)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;San Diego (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: E4, E6&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.35 V or 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 104 Watt max&lt;br /&gt;    * First Release: April 15, 2005&lt;br /&gt;    * Clockrate: 2600 MHz (FX-55), 2800 MHz (FX-57)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Toledo (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-core CPU&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: E6&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions), per core&lt;br /&gt;    * L2-Cache: 1024 KB fullspeed, per core&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.30 V - 1.35 V&lt;br /&gt;    * Power Consumption (TDP): 110 Watt max&lt;br /&gt;    * First Release: January 10, 2006&lt;br /&gt;    * Clockrate: 2600 MHz (FX-60)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Windsor (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-core CPU&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: F2, F3&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions), per core&lt;br /&gt;    * L2-Cache: 512 - 1024 KB fullspeed, per core&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;    * Socket AM2, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.30 V - 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 125 Watt max&lt;br /&gt;    * First Release: May 23, 2006&lt;br /&gt;    * Clockrate: 2000 - 3200 MHz (6400+)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Windsor (90 nm SOI) - Quad FX platform&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;    Main article: AMD Quad FX platform&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-core, dual CPUs (four cores total)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: F3&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions), per core&lt;br /&gt;    * L2-Cache: 1024 KB fullspeed, per core&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;    * Socket F (1207 FX), 2000 MHz HyperTransport (HT2000)&lt;br /&gt;    * VCore: 1.35 V - 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 125 Watt max per CPU&lt;br /&gt;    * First Release: November 30, 2006&lt;br /&gt;    * Clockrate: 2600 MHz (FX-70), 2800 MHz (FX-72), 3000 MHz (FX-74)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Athlon 64 models&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Clawhammer (130 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: C0, CG&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit (only CG)&lt;br /&gt;    * Socket 754, 800 MHz HyperTransport (HT800)&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.50 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt max&lt;br /&gt;    * First Release: September 23, 2003&lt;br /&gt;    * Clockrate: 2000–2600 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Newcastle (130 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;Also possible: ClawHammer-512 (Clawhammer with partially disabled L2-Cache)&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: CG&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 512 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 754, 800 MHz HyperTransport (HT800)&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.50 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt max&lt;br /&gt;    * First Release: 2004&lt;br /&gt;    * Clockrate: 1800–2400 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Winchester (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: D0&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 512 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 67 Watt max&lt;br /&gt;    * First Release: 2004&lt;br /&gt;    * Clockrate: 1800–2200 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Venice (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: E3, E6&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 512 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 754, 800 MHz HyperTransport (HT800)&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.35 V or 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt max&lt;br /&gt;    * First Release: April 4, 2005&lt;br /&gt;    * Clockrate: 1800–2400 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;San Diego (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: E4, E6&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 1024 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit&lt;br /&gt;    * Socket 939, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.35 V or 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 89 Watt max&lt;br /&gt;    * First Release: April 15, 2005&lt;br /&gt;    * Clockrate: 2200–2600 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Orleans (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: F2, F3&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 512 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;    * Socket AM2, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.25 V or 1.40 V&lt;br /&gt;    * Power Consumption (TDP): 62 Watt max&lt;br /&gt;    * First Release: May 23, 2006&lt;br /&gt;    * Clockrate: 1800–2600 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Lima (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * CPU-Stepping: G1&lt;br /&gt;    * L1-Cache: 64 + 64 KB (Data + Instructions)&lt;br /&gt;    * L2-Cache: 512 KB, fullspeed&lt;br /&gt;    * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit, AMD-V&lt;br /&gt;    * Socket AM2, 1000 MHz HyperTransport (HT1000)&lt;br /&gt;    * VCore: 1.25/1.35/1.40V&lt;br /&gt;    * Power Consumption (TDP): 45 Watt max&lt;br /&gt;    * First Release: February 20, 2007&lt;br /&gt;    * Clockrate: 2000–2800 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Successors&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The Athlon 64 line is expected to continue to evolve. In particular, new models scheduled to be launched starting from the third quarter of 2007 are to be based on the "K10" microarchitecture. The initial offerings are expected to be based on the Agena (quad-core, 2 MB L3 cache), and Kuma (dual-core, 2 MB L3 cache) cores. These processors will be packaged in Socket AM2+ form factors, but are expected to function in Socket AM2 motherboards as well, with the loss of HyperTransport 3.0 enhancements, which will only be available with Socket AM2+ motherboards.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-7714819589070829374?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/7714819589070829374/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=7714819589070829374' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7714819589070829374'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7714819589070829374'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/athlon-64.html' title='Athlon 64'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-3253799001039606232</id><published>2008-12-21T12:51:00.003+05:00</published><updated>2008-12-21T12:55:58.410+05:00</updated><title type='text'>Sempron</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Sempron"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 221px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/SU32gGE4T3I/AAAAAAAAACg/mZToe8Rx-2A/s320/AMD+Sempron.png" alt="" id="BLOGGER_PHOTO_ID_5282148969222786930" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Sempron has been the marketing name used by AMD for several different entry level desktop CPUs, using several different technologies and CPU socket formats.&lt;br /&gt;&lt;br /&gt;The Sempron replaced the AMD Duron processor and competes against Intel's Celeron D processor.&lt;br /&gt;&lt;br /&gt;AMD coined the name from the Latin semper, which means "always", to suggest the Sempron is suitable for "daily use, practical, and part of everyday life"[1].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History and features&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;The first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred or Thorton core. These models were equipped with the Socket A interface, 256 KiB L2 cache and 166 MHz Front side bus (FSB 333). Thoroughbred cores natively had 256 KiB L2 cache, but Thortons had 512 KiB L2 cache, half of which was disabled and could sometimes be reactivated by bridge modification. Later, AMD introduced the Sempron 3000+ CPU, based on the Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially identical to Athlon XP desktop CPUs with a new brand name. AMD has ceased production of all Socket A Sempron CPUs.&lt;br /&gt;&lt;br /&gt;The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport link, and AMD's "NX bit" feature.&lt;br /&gt;&lt;br /&gt;In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a niche market.&lt;br /&gt;&lt;br /&gt;In 2006, AMD announced the Socket AM2 and Socket S1 line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel DDR2 SDRAM memory controller which replaces the single-channel DDR SDRAM version. The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. In 2006, AMD was selling both Socket 754 and Socket AM2 Sempron CPUs concurrently. In the middle of 2007 AMD appears to have dropped the 754 line and is shipping AM2 and S1 Semprons.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Models for Socket A&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Thoroughbred B/Thorton (130 nm)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 256 KiB, fullspeed&lt;br /&gt;   * MMX, 3DNow!, SSE&lt;br /&gt;   * Socket A (EV6)&lt;br /&gt;   * Front side bus: 166 MHz (FSB 333)&lt;br /&gt;   * VCore: 1.6 V&lt;br /&gt;   * First release: July 28, 2004&lt;br /&gt;   * Clockrate: 1500 MHz - 2000 MHz (2200+ to 2800+)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Barton (130 nm)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 512 KiB, fullspeed&lt;br /&gt;   * MMX, 3DNow!, SSE&lt;br /&gt;   * Socket A (EV6)&lt;br /&gt;   * Front side bus: 166 MHz - 200 MHz (FSB 333 - 400)&lt;br /&gt;   * VCore: 1.6 - 1.65 V&lt;br /&gt;   * First release: September 17, 2004&lt;br /&gt;   * Clockrate: 2000–2200 MHz (Sempron 3000+, Sempron 3300+)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Models for Socket 754&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Paris (130 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 256 KiB, fullspeed&lt;br /&gt;   * MMX, 3DNow!, SSE, SSE2&lt;br /&gt;   * Enhanced Virus Protection (NX bit)&lt;br /&gt;   * Integrated 72-bit(Single channel, ECC capable) DDR memory controller&lt;br /&gt;   * Socket 754, 800 MHz HyperTransport&lt;br /&gt;   * VCore: 1.4 V&lt;br /&gt;   * First release: July 28, 2004&lt;br /&gt;   * Clockrate: 1800 MHz (3100+)&lt;br /&gt;   * Stepping: CG (Part No.: *AX)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Palermo (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 128/256 KiB, fullspeed&lt;br /&gt;   * MMX, 3DNow!, SSE, SSE2&lt;br /&gt;   * SSE3 support on E3 and E6 steppings&lt;br /&gt;   * AMD64 on E6 stepping&lt;br /&gt;&lt;br /&gt;#&lt;br /&gt;# Cool'n'Quiet (Sempron 3000+ and higher)&lt;br /&gt;# Enhanced Virus Protection (NX bit)&lt;br /&gt;# Integrated 72-bit(Single channel, ECC capable) DDR memory controller&lt;br /&gt;# Socket 754, 800 MHz HyperTransport&lt;br /&gt;# VCore: 1.4 V&lt;br /&gt;# First release: February 2005&lt;br /&gt;# Clockrate: 1400–2000 MHz&lt;br /&gt;&lt;br /&gt;   * 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)&lt;br /&gt;   * 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)&lt;br /&gt;&lt;br /&gt;# Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)&lt;br /&gt;&lt;br /&gt;Models for Socket 939&lt;br /&gt;Palermo (90 nm SOI)&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 128/256 KiB, fullspeed&lt;br /&gt;   * MMX, 3DNow!, SSE, SSE2, SSE3, AMD64 (E6 Steppings Only), Cool'n'Quiet, NX bit&lt;br /&gt;   * Integrated 144-bit(Dual channel, ECC capable) DDR memory controller&lt;br /&gt;   * Socket 939, 800 MHz HyperTransport&lt;br /&gt;   * VCore: 1.35/1.4 V&lt;br /&gt;   * First release: October 2005&lt;br /&gt;   * Clockrate: 1800–2000 MHz&lt;br /&gt;         o 128 KiB L2-Cache (Sempron 3000+, 3400+)&lt;br /&gt;         o 256 KiB L2-Cache (Sempron 3200+, 3500+)&lt;br /&gt;   * Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Models for Socket AM2&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Manila (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 128/256 KiB, fullspeed&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit&lt;br /&gt;   * Integrated 128-bit(Dual channel) DDR2 memory controller&lt;br /&gt;   * Socket AM2, 800 MHz HyperTransport&lt;br /&gt;   * VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)&lt;br /&gt;   * First release: May 23, 2006&lt;br /&gt;   * Clockrate: 1600–2000 MHz&lt;br /&gt;         o 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)&lt;br /&gt;         o 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+, 3800+)&lt;br /&gt;   * Stepping: F2 (Part No.: *CN, *CW&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Sparta (65 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 256/512 KiB, fullspeed&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit&lt;br /&gt;   * Integrated 128-bit(Dual channel) DDR2 memory controller&lt;br /&gt;   * Socket AM2, 800 MHz HyperTransport&lt;br /&gt;   * VCore: 1.20/1.40 V&lt;br /&gt;   * First release: August 20, 2007&lt;br /&gt;   * Clockrate: 1900–2300 MHz&lt;br /&gt;         o 256 KiB L2-Cache (Sempron LE-1100, LE-1150)&lt;br /&gt;         o 512 KiB L2-Cache (Sempron LE-1200, LE-1250, LE-1300)&lt;br /&gt;   * Stepping: G1 (Part No.: *DE), G2 (Part No.: *DP)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold; font-style: italic;"&gt;Models for Socket S1 (638)&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Keene (90 nm SOI)&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   * L1-Cache: 64 + 64 KiB (Data + Instructions)&lt;br /&gt;   * L2-Cache: 256 or 512 KiB, fullspeed&lt;br /&gt;   * MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit&lt;br /&gt;   * Integrated 128-bit(Dual channel) DDR2 memory controller&lt;br /&gt;   * Socket S1, 800 MHz HyperTransport&lt;br /&gt;   * VCore: 0.950-1.25 V&lt;br /&gt;   * First release: May 17, 2006&lt;br /&gt;   * Clockrate: 1000–2000 MHz&lt;br /&gt;         o 256 KiB L2-Cache (Sempron 2100+, 3400+)&lt;br /&gt;         o 512 KiB L2-Cache (Sempron 3200+, 3500+, 3600+)&lt;br /&gt;   * Stepping: F2 (Part No.: *CM)&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Future plans&lt;/span&gt;&lt;br /&gt;In 2008, Sempron-branded implementations of the Stars microarchitecture are expected to become available, based on the Rana core. These are expected to be dual-core processors without L3 cache. Initial clock rates will be between 2.1 GHz and 2.3 GHz. The Rana Semprons will feature HyperTransport 3.0 support and will be packaged for the Socket AM2+ form factor, although they are expected to function in Socket AM2 motherboards, albeit without support for HyperTransport 3.0 enhancements.[2]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-3253799001039606232?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/3253799001039606232/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=3253799001039606232' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3253799001039606232'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/3253799001039606232'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/sempron.html' title='Sempron'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/SU32gGE4T3I/AAAAAAAAACg/mZToe8Rx-2A/s72-c/AMD+Sempron.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-7957138451431779799</id><published>2008-12-21T12:49:00.003+05:00</published><updated>2008-12-21T12:51:34.374+05:00</updated><title type='text'>Geode (processor)</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Geode_%28processor%29#AMD_Geode"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 180px; height: 68px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SU31KBwCCZI/AAAAAAAAACY/oFEX7xTJOs4/s320/AMD+GEODE.png" alt="" id="BLOGGER_PHOTO_ID_5282147490592852370" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Geode is a series of x86-compatible System-on-a-chip microprocessors and I/O companions produced by AMD targeted at the embedded computing market.&lt;br /&gt;&lt;br /&gt;The series was originally launched by National Semiconductor as the Geode family in 1999. The original Geode processor core itself is derived from the Cyrix MediaGX platform, which was acquired in National's merger with Cyrix in 1997. AMD bought the Geode business from National in August 2003 to augment its existing line of embedded x86 processor products. AMD expanded the Geode series to two classes of processor: the MediaGX-derived Geode GX and LX, and the modern Athlon-derived Geode NX.&lt;br /&gt;&lt;br /&gt;Geode processors are optimized for low power consumption and low cost while still remaining compatible with software written for the x86 platform. The MediaGX-derived processors lack modern features such as SSE and a large on-die L1 cache but these are offered on the more recent Athlon-derived Geode NX. Geode processors tightly integrate some of the functions normally provided by a separate chipset, such as the northbridge. Whilst the processor family is best suited for thin client, set top box and embedded computing applications it can be found in unusual applications such as the Nao robot&lt;br /&gt;&lt;br /&gt;The One Laptop per Child project originally used the GX series Geode processor in the OLPC XO; but has since moved to the Geode LX. The Linutop is also based on the Geode LX. 3Com Audrey was powered by a 200 MHz Geode GX1.&lt;br /&gt;&lt;br /&gt;The SCxxxx range of Geode devices are a single-chip version, comparable to the SiS 552 or VIA CoreFusion, which integrate the CPU, memory controller, graphics and I/O devices into one package. Single processor boards based on these processors are manufactured by Artec Group, PC Engines (WRAP) and Soekris.&lt;br /&gt;&lt;br /&gt;These processors are named after geodes.&lt;br /&gt;&lt;br /&gt;National Semiconductor Geode&lt;br /&gt;Geode GXm&lt;br /&gt;&lt;br /&gt;Cyrix MediaGXm clone. Returns "CyrixInstead" on CPUID.&lt;br /&gt;&lt;br /&gt;    * MediaGX-derived core&lt;br /&gt;    * 0.35 µm four layer metal CMOS&lt;br /&gt;    * MMX instructions&lt;br /&gt;    * 3.3 V I/O, 2.9 V core&lt;br /&gt;    * 16 Kb write-back unified L1 cache&lt;br /&gt;    * PCI controller&lt;br /&gt;    * 64-bit SDRAM memory&lt;br /&gt;    * CS5530 companion chip (implements sound and video functions)&lt;br /&gt;    * VSA architecture&lt;br /&gt;    * 1280x1024x8 or 1024x768x16 display&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Geode GXLV&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * MediaGX-derived core&lt;br /&gt;    * 0.25 µm four layer metal CMOS&lt;br /&gt;    * 3.3 V I/O&lt;br /&gt;    * 2.2 V, 2.5 V, 2.9 V core&lt;br /&gt;    * 16 kb write-back unified L1 cache&lt;br /&gt;    * Fully static design&lt;br /&gt;    * 1.0 W @2.2 V/166 MHz, 2.5 W @2.9 V/266 MHz&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Geode GX1&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * MediaGX-derived core&lt;br /&gt;    * 0.18 µm CMOS&lt;br /&gt;    * 200 - 333 MHz&lt;br /&gt;    * 1.6 - 2.2 V core&lt;br /&gt;    * 16 kB (16 KiB) L1 cache&lt;br /&gt;    * 0.8 W - 1.2 W typical&lt;br /&gt;    * SDRAM memory 111 MHz&lt;br /&gt;    * CS5530A companion chip&lt;br /&gt;    * 85 Hz VGA refresh rate&lt;br /&gt;&lt;br /&gt;National Semiconductor/AMD SC1100 is based on the Cyrix GX1 core and the CS5530 support chip.&lt;br /&gt;Geode GX2&lt;br /&gt;&lt;br /&gt;Announced by National Semiconductor Corporation October, 2001 at Microprocessor Forum. First demonstration at COMPUTEX Taiwan, June, 2002.&lt;br /&gt;&lt;br /&gt;    * 0.15 µm process technology&lt;br /&gt;    * MMX and 3DNow! instructions&lt;br /&gt;    * 16 kB Instruction and 16 kB Data caches&lt;br /&gt;    * GeodeLink architecture, 6 GB/s on-chip bandwidth, up to 2 GB/s memory bandwidth&lt;br /&gt;    * Integrated 64-bit PC133 SDRAM and DDR266 controller&lt;br /&gt;    * Clockrate: 266, 333 and 400 MHz&lt;br /&gt;    * 3 PCI masters supported&lt;br /&gt;    * 1600x1200x24 bit display with video scaling&lt;br /&gt;    * CRT DACs and an UMA DSTN/TFT controller.&lt;br /&gt;    * Geode CS5535 companion chip&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;AMD Geode&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In 2002, AMD introduced the Geode GX series, which was a re-branding of the National Semiconductor GX2. This was quickly followed by the Geode LX, running up to 667 MHz. LX brought many improvements, such as higher speed DDR, a re-designed instruction pipe, and a more powerful display controller. The upgrade from the CS5535 I/O Companion to the CS5536 brought higher speed USB.&lt;br /&gt;&lt;br /&gt;Geode GX and LX processors are typically found in devices such as thin clients and industrial control systems. However they have come under competitive pressure from VIA on the x86 side, and ARM and XScale taking much of the low-end business.&lt;br /&gt;&lt;br /&gt;Because of the relatively poor performance of the GX and LX core design, AMD introduced the Geode NX, which is an embedded version of the highly-successful Athlon processor, K7. Geode NX uses the Thoroughbred core and is quite similar to the Athlon XP-M that use this core. The Geode NX includes 256KB of Level 2 cache, and runs fanless at up to 1 GHz in the NX1500@6W version. The NX2001 part runs at 1.8 GHz, the NX1750 part runs at 1.4 GHz, and the NX1250 runs at 667 MHz.&lt;br /&gt;&lt;br /&gt;The Geode NX, with its strong FPU, is particularly suited for embedded devices with graphical performance requirements, such as information kiosks and casino gaming machines, such as video slots.&lt;br /&gt;&lt;br /&gt;However, it was reported that the specific design team for Geode processors in Longmont, Colorado, has been closed, and 75 employees are being relocated to the new development facility in Fort Collins, Colorado. It is expected that the Geode line of processors will be updated less frequently due to the closure of the Geode design center [1].&lt;br /&gt;Geode GX&lt;br /&gt;&lt;br /&gt;   1. Geode GX 466@0.9 W: clock speed: 333 MHz&lt;br /&gt;   2. Geode GX 500@1.0 W: clock speed: 366 MHz&lt;br /&gt;   3. Geode GX 533@1.1 W: clock speed: 400 MHz&lt;br /&gt;&lt;br /&gt;Geode LX&lt;br /&gt;AMD Geode LX 800 (500MHz) CPU.&lt;br /&gt;&lt;br /&gt;   1. LX 700@0.8 W: clock speed: 433 MHz, with power consumption: 1.3 watts. (TDP 3.1 W)&lt;br /&gt;   2. LX 800@0.9 W: clock speed: 500 MHz, with power consumption: 1.8 watts. (TDP 3.6 W)&lt;br /&gt;   3. LX 900@1.5 W: clock speed: 600 MHz, with power consumption: 2.6 watts. (TDP 5.1 W)&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Features:&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * Low power.&lt;br /&gt;    * Full x86 compatibility.&lt;br /&gt;    * Processor functional blocks:&lt;br /&gt;          o CPU Core&lt;br /&gt;          o GeodeLink Control Processor&lt;br /&gt;          o GeodeLink Interface Units&lt;br /&gt;          o GeodeLink Memory Controller&lt;br /&gt;          o Graphics Processor&lt;br /&gt;          o Display Controller&lt;br /&gt;          o Video Processor&lt;br /&gt;          o Video Input Port&lt;br /&gt;          o GeodeLink PCI Bridge&lt;br /&gt;          o Security Block&lt;br /&gt;                + 128-Bit Advanced Encryption Standard (AES) - (CBC/ECB)&lt;br /&gt;                + True Random Number Generator&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Specification:&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * Processor frequency up to 600 MHz (LX900), 500 MHz (LX800) and 433 MHz (LX700).&lt;br /&gt;    * Power management: ACPI, lower power, wakeup on SMI/INTR.&lt;br /&gt;    * 64K Instruction / 64K Data L1 cache and 128K L2 cache&lt;br /&gt;    * Split Instruction/Data cache/TLB.&lt;br /&gt;    * DDR Memory 400 MHz (LX 800), 333 MHz (LX 700)&lt;br /&gt;    * Integrated FPU with MMX and 3DNow!&lt;br /&gt;    * 9 GB/s internal GeodeLink Interface Unit (GLIU)&lt;br /&gt;    * Simultaneous, high-res CRT and TFT (High and standard definition). VESA 1.1 and 2.0 VIP/VDA support&lt;br /&gt;    * Manufactured at a 0.13 micrometre process&lt;br /&gt;    * 481-terminal PBGA (Plastic Ball grid array)&lt;br /&gt;    * GeodeLink active hardware power management&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Geode NX&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;   1. NX 1250@6W: Clock speed: 667 MHz, power consumption: 6 watts (1.0 volts core operating voltage).&lt;br /&gt;   2. NX 1500@6W: Clock speed: 1 GHz, power consumption: 9 watts (1.1 volts core operating voltage).&lt;br /&gt;   3. NX 1750@14W: Clock speed: 1.4 GHz, power consumption: 25 watts (1.25 volts core operating voltage).&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Features:&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;    * 7th generation core (based on Mobile Athlon XP-M).&lt;br /&gt;    * Power management: AMD PowerNow!, ACPI 1.0b and ACPI 2.0.&lt;br /&gt;    * 128 KB L1 cache.&lt;br /&gt;    * 256 KB L2 cache with hardware data prefetch&lt;br /&gt;    * 133 MHz Front Side Bus (FSB)&lt;br /&gt;    * 3DNow!, MMX and SSE instruction sets&lt;br /&gt;    * 0.13 µm (130 nm) fabrication process&lt;br /&gt;    * Pin compatibility between all NX family processors.&lt;br /&gt;    * OS support: Linux, Windows CE, MS Windows XP.&lt;br /&gt;    * Compatible with Socket A motherboards&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Geode NX 2001&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;In 2007, there was a Geode NX 2001 model on sale, which in fact was a relabelled Athlon XP 2200+ Thoroughbred. The processors, with part numbers AANXA2001FKC3G or ANXA2001FKC3D, their specifications are 1.8 GHz clock speed, and 1.65 volt core operating voltage, the power consumption is not specified. There are no official references to this processor except officials explaining that the batch of CPUs were "being shipped to specific customers", though it is clear it has no relation with the other Geode NX CPUs other than sharing the same CPU socket (Socket A). [2]&lt;br /&gt;Chipsets for Geode&lt;br /&gt;&lt;br /&gt;   1. AMD Geode CS5530A Southbridge for Geode GX1.&lt;br /&gt;   2. AMD Geode CS5535 Southbridge for Geode GX and Geode LX (USB 1.1). Integrates four USB ports, one ATA-66 UDMA controller, one Infrared communication port, one AC97 controller, one SMBUS controller, one LPC port, as well as GPIO, Power Management, and legacy functional blocks.&lt;br /&gt;   3. AMD Geode CS5536 Southbridge for Geode GX and Geode LX (USB 2.0). Power consumption: 1.9 W (433 MHz) and 2.4 W (500 MHz). This chipset is also used on PowerPC board (Amy'05).&lt;br /&gt;   4. Geode NX processors are "100 percent socket and chipset compatible" with AMD's Socket A Athlon XP processors: SIS741CX Northbridge and SIS 964 Southbridge, VIA KM400 Northbridge and VIA VT8235 Southbridge, VIA KN400A Northbridge and VIA VT8237R Southbridge and other Socket A chipsets.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-7957138451431779799?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/7957138451431779799/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=7957138451431779799' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7957138451431779799'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7957138451431779799'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/geode-processor.html' title='Geode (processor)'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SU31KBwCCZI/AAAAAAAAACY/oFEX7xTJOs4/s72-c/AMD+GEODE.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-6882361943841877218</id><published>2008-12-18T00:12:00.004+05:00</published><updated>2008-12-18T00:16:44.811+05:00</updated><title type='text'>AMD (Advanced Micro Devices)</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://1.bp.blogspot.com/_osm1u2yPFJw/SUlP6guLxPI/AAAAAAAAACM/qQ8C8dDOyFk/s1600-h/AMD2.jpg"&gt;&lt;img style="float:left; margin:0 10px 10px 0;cursor:pointer; cursor:hand;width: 250px; height: 188px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SUlP6guLxPI/AAAAAAAAACM/qQ8C8dDOyFk/s320/AMD2.jpg" border="0" alt="" id="BLOGGER_PHOTO_ID_5280839904703268082" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;div&gt;Advanced Micro Devices, Inc. (AMD) (NYSE: AMD) is an American multinational semiconductor company based in Sunnyvale, California, that develops computer processors and related technologies for commercial and consumer markets. Its main products include microprocessors, motherboard chipsets, embedded processors and graphics processors for servers, workstations and personal computers, and processor technologies for handheld devices, digital television, and game consoles.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD is the second-largest global supplier of microprocessors based on the x86 architecture after Intel Corporation, and the third-largest supplier of graphics processing units. It also owns 21 percent of Spansion, a supplier of non-volatile flash memory. In 2007, AMD ranked eleventh among semiconductor manufacturers in terms of revenue.[1]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Corporate history&lt;/span&gt;&lt;/div&gt;&lt;div&gt;Advanced Micro Devices was founded on May 1, 1969, by a group of former executives from Fairchild Semiconductor, including Jerry Sanders, III, Ed Turney, John Carey, Sven Simonsen, Jack Gifford and three members from Gifford's team, Frank Botte, Jim Giles, and Larry Stenger. The company began as a producer of logic chips, then entered the RAM chip business in 1975. That same year, it introduced a reverse-engineered clone of the Intel 8080 microprocessor. During this period, AMD also designed and produced a series of bit-slice processor elements (Am2900, Am29116, Am293xx) which were used in various minicomputer designs.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;During this time, AMD attempted to embrace the perceived shift towards RISC with their own AMD 29K processor, and they attempted to diversify into graphics and audio devices as well as EPROM memory. It had some success in the mid-80s with the AMD7910 and AMD7911 "World Chip" FSK modem, one of the first multistandard devices that covered both Bell and CCITT tones at up to 1200 baud half duplex or 300/300 full duplex. While the AMD 29K survived as an embedded processor and AMD spinoff Spansion continues to make industry leading flash memory, AMD was not as successful with its other endeavors. AMD decided to switch gears and concentrate solely on Intel-compatible microprocessors and flash memory. This put them in direct competition with Intel for x86 compatible processors and their flash memory secondary markets.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD announced a merger with ATI Technologies on July 24, 2006. AMD paid $4.3 billion in cash and 58 million shares of its stock for a total of US$5.4 billion. The merger completed on October 25, 2006[2] and ATI is now part of AMD.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;It has been reported in December 2006 that AMD along with its main rival in the graphics industry nVidia, received subpoenas from the Justice Department regarding possible antitrust violations in the graphics card industry, including the act of fixing prices.[3]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In October 2008, AMD stated that it is going to spin off their manufacturing operations in the form of a multibillion-dollar joint venture with Advanced Technology Investment Co., an investment company formed by the government of Abu Dhabi. The new venture is called Foundry Co. This will allow AMD to focus solely on chip design.[4]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;&lt;span class="Apple-style-span" style="font-style: italic;"&gt;Processor market history&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;IBM PC and the x86 architecture&lt;/span&gt;&lt;/div&gt;&lt;div&gt;In February 1982, AMD signed a contract with Intel, becoming a licensed second-source manufacturer of 8086 and 8088 processors. IBM wanted to use the Intel 8088 in its IBM PC, but IBM's policy at the time was to require at least two sources for its chips. AMD later produced the Am286 under the same arrangement, but Intel canceled the agreement in 1986 and refused to convey technical details of the i386 part. AMD challenged Intel's decision to cancel the agreement and won in arbitration, but Intel disputed this decision. A long legal dispute followed, ending in 1994 when the Supreme Court of California sided with AMD. Subsequent legal disputes centered on whether AMD had legal rights to use derivatives of Intel's microcode. In the face of uncertainty, AMD was forced to develop "clean room" versions of Intel code.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In 1991, AMD released the Am386, its clone of the Intel 386 processor. It took less than a year for the company to sell a million units. Later, the Am486 was used by a number of large original equipment manufacturers, including Compaq, and proved popular. Another Am486-based product, the Am5x86, continued AMD's success as a low-price alternative. However, as product cycles shortened in the PC industry, the process of reverse engineering Intel's products became an ever less viable strategy for AMD.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD's first in-house x86 processor was the K5 which was launched in 1996.[5] The "K" was a reference to "Kryptonite", which from comic book lore, was the only substance that could harm Superman, with a clear reference to Intel, which dominated in the market at the time, as "Superman".[6]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In 1996, AMD purchased NexGen specifically for the rights to their Nx series of x86-compatible processors. AMD gave the NexGen design team their own building, left them alone, and gave them time and money to rework the Nx686. The result was the K6 processor, introduced in 1997.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;K5, K6 and Athlon&lt;/span&gt;&lt;/div&gt;&lt;div&gt;The K7 was AMD's seventh generation x86 processor, making its debut on June 23, 1999, under the brand name Athlon. On October 9, 2001 the Athlon XP was released, followed by the Athlon XP with 512KB L2 Cache on February 10, 2003.[7]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Athlon 64, Opteron and Phenom&lt;/span&gt;&lt;/div&gt;&lt;div&gt;The K8 was a major revision of the K7 architecture, with the most notable features being the addition of a 64-bit extension to the x86 instruction set (officially called AMD64), the incorporation of an on-chip memory controller, and the implementation of an extremely high performance point-to-point interconnect called HyperTransport, as part of the Direct Connect Architecture. The technology was initially launched as the Opteron server-oriented processor.[8] Shortly thereafter it was incorporated into a product for desktop PCs, branded Athlon 64.[9]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD released the first dual core Opteron, an x86-based server CPU, on April 21, 2005.[10] The first desktop-based dual core processor family — the Athlon 64 X2 — came a month later.[11] In early May 2007, AMD had abandoned the string "64" in its dual-core desktop product branding, becoming Athlon X2, downplaying the significance of 64-bit computing in its processors while upcoming updates involves some of the improvements to the microarchitecture, and a shift of target market from mainstream desktop systems to value dual-core desktop systems. AMD has also started to release dual-core Sempron processors in early 2008 exclusively in China, branded as Sempron 2000 series, with lower HyperTransport speed and smaller L2 cache, thus the firm completes its dual-core product portfolio for each market segment.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;The latest AMD microprocessor architecture, known as K10, became the successor to the K8 microarchitecture. The first processors released on this architecture were introduced on September 10, 2007 consisting of nine quad-core Third Generation Opteron processors. This was followed by the Phenom processor for desktop. K10 processors will come in dual, triple-core,[12] and quad-core versions with all cores on one single die.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Fusion&lt;/span&gt;&lt;/div&gt;&lt;div&gt;After the merger between AMD and ATI, an initiative codenamed Fusion was announced that merges a CPU and GPU on one chip, including a minimum 16 lane PCI Express link to accommodate external PCI Express peripherals, thereby eliminating the requirement of a northbridge chip completely from the motherboard. AMD will move to a modular design methodology named "M-SPACE", where two new processor cores, codenamed "Bulldozer" and "Bobcat" will be released in the 2009 timeframe.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;While very little preliminary information exists even in AMD's Technology Analyst Day 2007, both cores are to be built from the ground up. The Bulldozer core focused on 10 watt to 100 watt products, with optimizations for performance-per-watt ratios and HPC applications and includes newly announced SSE5 instructions, while the Bobcat core will focus on 1 watt to 10 watt products, given that the core is a simplified x86 core to reduce power draw. Both of the cores will be able to incorporate full DirectX compatible GPU core(s) under the Fusion label, or as standalone products as a general purpose CPU.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-style: italic;"&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Other platforms and technologies&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;AMD chipsets&lt;/span&gt;&lt;/div&gt;&lt;div&gt;Before the launch of Athlon 64 processors in 2003, AMD designed chipsets for their processors spanning the K6 and K7 processor generations. The chipsets include the AMD-640, AMD-751 and the AMD-761 chipsets. The situation changed in 2003 with the release of Athlon 64 processors, and AMD chose not to further design its own chipsets for its desktop processors while opening the desktop platform to allow other firms to design chipsets. This is the "Open Platform Initiative". The initiative was proven to be a success, with many firms such as Nvidia, ATI, VIA and SiS developing their own chipset for Athlon 64 processors and later Athlon 64 X2 and Athlon 64 FX processors, including the Quad FX platform chipset from Nvidia.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;The initiative went further with the release of Opteron server processors as AMD stopped the design of server chipsets in 2004 after releasing the AMD-8111 chipset, and again opened the server platform for firms to develop chipsets for Opteron processors. As of today, Nvidia and Broadcom are the sole designing firms of server chipsets for Opteron processors.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;As the company completed the acquisition of ATI Technologies in 2006, the firm gained the ATI design team for chipsets which previously designed the Radeon Xpress 200 and the Radeon Xpress 3200 chipsets. AMD then renamed the chipsets for AMD processors under AMD branding (for instance, the CrossFire Xpress 3200 chipset was renamed as AMD 580X CrossFire chipset). In February 2007, AMD announced the first AMD-branded chipset since 2004 with the release of the AMD 690G chipset (previously under the development codename RS690), targeted at mainstream IGP computing. It was the industry's first to implement a HDMI 1.2 port on motherboards, shipping for more than a million units. While ATI had aimed at releasing an Intel IGP chipset, the plan was scrapped and the inventories of Radeon Xpress 1250 (codenamed RS600, sold under ATI brand) was sold to two OEMs, Abit and AsRock. Although AMD states the firm will still produce Intel chipsets, Intel had not granted the license of 1333 MHz FSB to ATI. Considering the rivalry between AMD and Intel, AMD is less likely to release more Intel chipset designs in the foreseeable future.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;On November 15, 2007, AMD has announced a new chipset series portfolio, the AMD 7-Series chipsets, covering from enthusiast multi-graphics segment to value IGP segment, to replace the AMD 480/570/580 chipsets and AMD 690 series chipsets. Marking AMD's first enthusiast multi-graphics chipset. Discrete graphics chipsets were launched on November 15, 2007 as part of the codenamed Spider desktop platform, and IGP chipsets were launched at a later time in Spring 2008 as part of the codenamed Cartwheel platform.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD will also return to the server chipsets market with the next-generation AMD 800S series server chipsets, scheduled to be released in 2009 timeframe.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;AMD Live!&lt;/span&gt;&lt;/div&gt;&lt;div&gt;AMD LIVE! is a platform marketing initiative focusing the consumer electronics segment, with a recently announced Active TV initiative for streaming Internet videos from web video services such as YouTube, into AMD Live! PC as well as connected digital TVs, together with a scheme for an ecosystem of certified peripherals for the ease of customers to identify peripherals for AMD Live! systems for digital home experience, called "AMD Live! Ready".[13]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;AMD Quad FX platform&lt;/span&gt;&lt;/div&gt;&lt;div&gt;The AMD Quad FX platform, being an extreme enthusiast platform, allows two processors to connect through HyperTransport, which is a similar setup to dual-processor (2P) servers, excluding the use of buffered memory/registered memory DIMM modules, and a server motherboard, the current setup includes two Athlon 64 FX FX-70 series processors and a special motherboard. AMD pushed the platform for the surging demands for what AMD calls "megatasking" for true enthusiasts,[14] the ability to do more tasks on one single system. The platform refreshes with the introduction of Phenom FX processors and the next-generation RD790 chipset, codenamed "FASN8".&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Commercial platform&lt;/span&gt;&lt;/div&gt;&lt;div&gt;The first AMD server/workstation platform after ATI acquisition is scheduled to be released on 2009 timeframe. Codenamed Fiorano, AMD's first multi-processor server platform after ATI acquisition consists of AMD SR5690 + SP5100 server chipsets, supporting 45 nm, codenamed Shanghai Socket F+ processors and registered DDR2 memory. Future update include the Maranello platform supporting 45 nm, codenamed Istanbul, Socket G34 processors with DDR3 memory. On single-processor platform, the codenamed Catalunya platform consists of codenamed Suzuka 45 nm quad-core processor with AMD SR5580 + SP5100 chipset and DDR3 support. [15]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD's virtualization extension to the 64-bit x86 architecture is named AMD Virtualization, also known by the abbreviation AMD-V, and is sometimes referred to by the code name "Pacifica". AMD processors using Socket AM2, Socket S1, and Socket F include AMD Virtualization support. AMD Virtualization is also supported by release two (8200, 2200 and 1200 series) of the Opteron processors. The third generation (8300 and 2300 series) of Opteron processors will see an update in virtualization technology, specifically the Rapid Virtualization Indexing (also known by the development name Nested Page Tables), alongside the Tagged TLB and Device Exclusion Vector (DEV).&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD also promotes the "AMD I/O Virtualization Technology" (also known as IOMMU) for I/O virtualization.[16] The AMD IOMMU specification has been updated to version 1.2.[17] The specification describes the use of a HyperTransport architecture.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;AMD's commercial initiatives include the following:&lt;/span&gt;&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;    * AMD Trinity, provides support for virtualization, security and management. Key features include AMD-V technology, codenamed Presidio trusted computing platform technology, I/O Virtualization and Open Management Partition.[18]&lt;/div&gt;&lt;div&gt;    * AMD Raiden, future clients similar to the Jack PC[19] to be connected through network to a blade server for central management, to reduce client form factor sizes with AMD Trinity features.&lt;/div&gt;&lt;div&gt;    * Torrenza, coprocessors support through interconnects such as HyperTransport as PCI Express (though more focus was at HyperTransport enabled coprocessors), also opening processor socket architecture to other manufacturers, Sun and IBM are among the supporting consortium, with rumoured POWER7 processors would be socket-compatible to future Opteron processors. The move made rival Intel responded with the open of Front Side Bus (FSB) architecture as well as Geneseo,[20] a collaboration project with IBM for coprocessors connected through PCI Express. Note that AMD positioned Torrenza for commercial segment, whilst Intel positioned Geneseo for all segments including consumer desktop segments[citation needed].&lt;/div&gt;&lt;div&gt;    * Various certified systems programs and platforms: AMD Commercial Stable Image Platform (CSIP), together with AMD Validated Server program, AMD True Server Solutions, AMD Thermally Tested Barebones Platforms and AMD Validated Server Program, providing certified systems for business from AMD.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Desktop platforms&lt;/span&gt;&lt;/div&gt;&lt;div&gt;Starting in 2007, AMD, following Intel, began using codenames for its desktop platforms such as Spider. The platforms, unlike Intel's approach, will refresh every year, putting focus on platform specialization. The platform includes components as AMD processors, chipsets, ATI graphics and other features, but continued to the open platform approach, and welcome components from other vendors such as VIA, SiS, and Nvidia, as well as wireless product vendors.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;Updates to the platform includes the implemtation of IOMMU I/O Virtualization with 45 nm generation of processors, and the AMD 800 chipset series in 2009.[21]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Embedded systems&lt;/span&gt;&lt;/div&gt;&lt;div&gt;In February 2002, AMD acquired Alchemy Semiconductor and continued its line of processor in MIPS architecture processors, targets the hand-held and Portable media player markets. On June 13, 2006, AMD officially announced that the Alchemy processor line was transferred to Raza Microelectronics Inc.[22]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In August 2003, AMD also purchased the Geode business which was originally the Cyrix MediaGX from National Semiconductor to augment its existing line of embedded x86 processor products. During the second quarter of 2004, it launched new low-power Geode NX processors based on the K7 Thoroughbred architecture with speeds of fanless processors 667 MHz and 1 GHz, and 1.4 GHz processor with fan, of TDP 25 W. This technology is used in a variety of embedded systems (Casino slot machines and customer kiosks for instance), several UMPC designs in Asia markets, as well as the OLPC XO-1 computer, an inexpensive laptop computer intended to be distributed to children in developing countries around the world.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;For the past couple of years AMD has been introducing 64-bit processors into its embedded product line starting with the AMD Opteron processor. Leveraging the high throughput enabled through HyperTransport and the Direct Connect Architecture these server class processors have been targeted at high end telecom and storage applications. In 2006 AMD added the AMD Athlon, AMD Turion and Mobile AMD Sempron processors to its embedded product line. Leveraging the same 64-bit instruction set and Direct Connect Architecture as the AMD Opteron but at lower power levels and in smaller footprint packages[citation needed], these processors were well suited to a variety of traditional embedded applications. Throughout 2007 and into 2008 AMD has continued to add both single-core Mobile AMD Sempron and AMD Athlon processors and dual-core AMD Athlon X2 and AMD Turion processors to its embedded product line and now offers embedded 64-bit solutions starting with 8W TDP Mobile AMD Sempron and AMD Athlon processors for fan-less designs up to multi-processor systems leveraging multi-core AMD Opteron processors all supporting longer than standard availability.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In April 2007, AMD announced the release of the M690T integrated graphics chipset for embedded designs. This enabled AMD to offer complete processor and chipset solutions targeted at embedded applications requiring high performance 3D and video such as emerging digital signage, kiosk and Point of Sale applications. The M690T was followed by the M690E specifically for embedded applications which removed the TV output, which required Macrovision licensing for OEMs, and enabled native support for dual TMDS outputs, enabling dual independent DVI interfaces.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Flash technology&lt;/span&gt;&lt;/div&gt;&lt;div&gt;While less visible to the general public than its CPU business, AMD is also a global leader in flash memory. In 1993, AMD established a 50-50 partnership with Fujitsu called FASL, and merged into a new company called FASL LLC in 2003. The joint venture firm went public under ticker symbol SPSN in December 2005, with AMD shares drop to 37%.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD no longer directly participates in the Flash memory devices market now as AMD entered into a non-competition agreement, as of December 21, 2005, with Fujitsu and Spansion, pursuant to which it agreed not to directly or indirectly engage in a business that manufactures or supplies standalone semiconductor devices (including single chip, multiple chip or system devices) containing only Flash memory.[23]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Mobile platforms&lt;/span&gt;&lt;/div&gt;&lt;div&gt;AMD started a platform in 2003 aimed at mobile computing, but, with fewer advertisements and promotional schemes, very little was known about the platform. The platform used mobile Athlon 64 or mobile Sempron processors.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;As part of the "Better by design" initiative, the open mobile platform, announced February 2007 with announcement of general availability in May 2007, comes together with 65 nm fabrication process Turion 64 X2, and consists of three major components: an AMD processor, graphics from either Nvidia or ATI Technologies which also includes integrated graphics (IGP), and wireless connectivity solutions from Atheros, Broadcom, Marvell, Qualcomm or Realtek.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;The Puma platform and Turion Ultra processor was released on June 4, 2008. In the future, AMD plans quad-core processors with 3D graphics capabilities (Fusion) to be launched in 2009 as the Eagle platform.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Other initiatives&lt;/span&gt;&lt;/div&gt;&lt;div&gt;    * 50x15, digital inclusion, with targeted 50% of world population to be connected through Internet via affordable computers by the year of 2015.&lt;/div&gt;&lt;div&gt;    * The Green Grid,[24] founded by AMD together with other founders, such as IBM, Sun and Microsoft, to seek lower power consumption for grids. Intel was notably absent from the consortium when it was founded, and finally joined in early 2007.[25]&lt;/div&gt;&lt;div&gt;    * Codenamed SIMFIRE interoperability testing tool for the Desktop and mobile Architecture for System Hardware (DASH) open architecture.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Software&lt;/span&gt;&lt;/div&gt;&lt;div&gt;Extensions for software parallelism (xSP), aimed at speeding up programs to enable multi-threaded and multi-core processing, announced in Technology Analyst Day 2007. One of the initiative being discussed since August 2007 is the Light Weight Profiling (LWP), providing internal hardware monitor with runtimes, to observe information about executing process and help the re-design of software to be optimized with multi-core and even multi-threaded programs. Another one is the extension of Streaming SIMD Extension (SSE) instruction set, the SSE5.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Technologies from ATI&lt;/span&gt;&lt;/div&gt;&lt;div&gt;After the takeover of ATI, AMD restructured some of the product lineups from both companies. Some products were being rebranded under the AMD brand, including the Imageon for mobile phones and handheld devices, the Xilleon for consumer electronics (digital TV sets), ATI Xpress chipsets (to AMD chipsets) for AMD processors platform and GPGPU computing line-up FireStream, previously known as AMD Stream Processor. Some others retained the use of ATI branding, including the Radeon line of graphics, and chipsets for Intel processors.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Production and fabrication&lt;/span&gt;&lt;/div&gt;&lt;div&gt;AMD produces their own processors in wholly owned semiconductor Fabrication Plants, called "FABs". AMD uses a "FAB x" naming convention for their production facilities, where "x" is the number of years that have passed between the founding of AMD and the date the FAB opened.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;At their Fabrication facilities, AMD utilizes a system called Automated Precision Manufacturing (APM). APM is a collection of manufacturing technologies AMD has developed over their history (many of which AMD holds patents for), which are designed to enhance the microprocessor production process, primarily in terms of yield. Much of APM is related to removing the "human equation" from the manufacturing process by isolating in-process wafers in containers that are only exposed to clean room facilities. AMD claims that the technologies that combine to make APM are unique to the industry and make it the foremost semiconductor manufacturer in the world - a fact which is lent some credence by their current agreement with Chartered Semiconductor Manufacturing based in Singapore.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD currently has a production agreement with foundry Chartered Semiconductor Manufacturing which allows Chartered access to AMD Automated Precision Manufacturing (APM) process technology, in exchange for which Chartered will act as extra production capacity for AMD.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;Through the acquisition of ATI, AMD also has manufacturing agreements with TSMC to produce ATI's lines of graphics and chipset processors. It is currently unclear how much of ATI's manufacturing needs will be moved to AMD's own fabs and how much will remain outsourced to other foundry companies, but AMD has announced plans for future processors to be outsourced to TSMC, while coincidently TSMC had announced it had received orders to fabricate x86 processors.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD's main microprocessor manufacturing and design facilities are located in Dresden, Germany. Additionally, highly integrated microprocessors are manufactured in Taiwan made by third-party manufacturers under strict license from AMD. Between 2003 and 2005, they constructed a second manufacturing plant (300 mm 90 nm process SOI) in the same complex in order to increase the number of chips they can produce, thus becoming more competitive with Intel. The new plant has been named "Fab 36", in recognition of AMD's 36 years of operation, and is expected to reach full production in mid-2007. AMD recently announced that they have just completed the conversion of Fab 36 from 90 nm to 65 nm and have now shifted their focus to the 45 nm conversion.[26]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD has planned expansions in their production capacity. In addition to the completion of Fab 36 in Dresden, AMD is planning to upgrade Fab 30 (adjacent to Fab 36) in Dresden from 200 mm 90 nm process SOI to a 300 mm 65 nm process SOI facility and rename it Fab 38. Originally, Fab 30 was supposed to begin 65 nm production in late 2007 but AMD recently announced they would slow down the upgrade to reduce capital expenditures.[27]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;Packaging and testing facilities for its microprocessor products are located in Singapore, Malaysia and China.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;Furthermore, AMD announced plans to open a new $3.2 billion facility at the Luther Forest Technology Campus across the towns of Malta and Stillwater in Saratoga County, New York. This new Fab 4x will likely produce 300 mm 32 nm process SOI production, with construction taking place from 2009 to 2010. Some speculation exists as to whether this facility will use high-K/metal gate technology that AMD obtained from IBM.[28]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD has also invested $3billion to build a chip fabrication plant in India. Currently, AMD is manufacturing chips in India as a result of their partnership with SemIndia, a group of investors aiming at building a wafer fab, as well as assembly and test operation centers. "AMD ponders over new chip plant in India"&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In June 2006, Chartered Semiconductor began shipments of manufactured AMD microprocessors, many of which are shipped from Singapore to Taiwanese and Chinese OEM/ODM manufacturing companies that build computers for companies like Lenovo and Dell.[29]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD maintains major design facilities in Fort Collins, CO, Sunnyvale, CA, Austin, TX, Boxborough, MA and Bangalore, India. With the acquisition of ATI Technologies, the company gained ownership over major design facilities in Markham, ON and Santa Clara, CA.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;&lt;span class="Apple-style-span" style="font-style: italic;"&gt;Corporate affairs&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Partnerships&lt;/span&gt;&lt;/div&gt;&lt;div&gt;AMD utilizes strategic industry partnerships to further its business interests as well as to tackle Intel's dominance and resources. Notably Nvidia's nForce2 chipset generated substantial revenues for Nvidia as a popular enthusiast part.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;A partnership between AMD and Alpha Processor Inc. developed HyperTransport, a point-to-point interconnect standard which was turned over to an industry standards body for finalization. It is now used in modern AMD processor compatible motherboards.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD also formed a strategic partnership with IBM, under which AMD gained silicon on insulator (SOI) manufacturing technology, and detailed advice on 90 nm implementation, the partnership was announced by AMD to be extended to 2011 for 32 nm and 22 nm fabrication related technologies.[30] Further, AMD is loosely partnered with end-user companies such as HP, Compaq, ASUS, Alienware, Acer, Evesham Technology, Dell and several others to facilitate processor distribution and sales.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;On May 18, 2006, Dell announced that it would roll out new servers based on AMD's Opteron chips by years end, thus ending an exclusive relationship with Intel. Dell also began offering AMD Athlon X2 chips in their desktop line-up in September 2006.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;AMD is also a sponsor of the Scuderia Ferrari Marlboro F1 Team since 2002 and the Discovery Channel Pro Cycling Team since 2004.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;Litigation with Intel&lt;/div&gt;&lt;div&gt;AMD has a long history of litigation with former partner and x86 creator Intel.[31][32][33]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;    * In 1986 Intel broke an agreement it had with AMD to allow them to produce Intel's micro-chips for IBM; AMD filed for arbitration in 1987 and the arbitrator decided in AMD's favor in 1992. Intel disputed this, and the case ended up in the Supreme Court of California. In 1994, that court upheld the arbitrator's decision and awarded damages for breach of contract.&lt;/div&gt;&lt;div&gt;    * In 1990, Intel brought a copyright infringement action alleging illegal use of its 287 microcode. The case ended in 1994 with a jury finding for AMD and its right to use Intel's microcode in its microprocessors through the 486 generation.&lt;/div&gt;&lt;div&gt;    * In 1997, Intel filed suit against AMD and Cyrix Corp. for misuse of the term MMX. AMD and Intel settled, with AMD acknowledging MMX as a trademark owned by Intel, and with Intel granting AMD rights to market the AMD K6 MMX processor.&lt;/div&gt;&lt;div&gt;    * In 2005, following an investigation, the Japan Federal Trade Commission found Intel guilty on a number of violations. On June 27, 2005, AMD won an antitrust suit against Intel in Japan, and on the same day, AMD filed a broad antitrust complaint against Intel in the U.S. Federal District Court in Delaware. The complaint alleges systematic use of secret rebates, special discounts, threats, and other means used by Intel to lock AMD processors out of the global market. Since the start of this action, The Court has issued subpoenas to major computer manufacturers including Acer, Dell, Lenovo, HP and Toshiba.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;&lt;span class="Apple-style-span" style="font-weight: bold;"&gt;Events and publications&lt;/span&gt;&lt;/div&gt;&lt;div&gt;Although AMD frequently refuses to provide information about upcoming products and plans, it does hold annual Technology Analyst Days (often shortened to "Analyst Day") to reveal and explain key future technologies, and to present official technology roadmaps. The event held in mid-year is referred to as "Technology Analyst Day", with its main focus on upcoming technologies and trends[34]. The end-of-year event is referred to as "Financial Analyst Day" and focuses on the financial performance of the company through the previous year[35]&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div&gt;In addition to these events, AMD also publishes printed media. Publications include the AMD Accelerate and the discontinued AMDEdge. The AMD Accelerate magazine, originally published through Ziff Davis Media, focuses on SME and business applications, while AMD Edge focused on overall technologies from AMD. Since Ziff Davis Media filed for Chapter 11 bankruptcy protection, the AMD Accelerate magazine has been published through IDG. AMD also has electronic newsletters to promote its server-oriented Opteron processors and related business solutions.&lt;/div&gt;&lt;div&gt;&lt;br /&gt;&lt;/div&gt;&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-6882361943841877218?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/6882361943841877218/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=6882361943841877218' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6882361943841877218'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6882361943841877218'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/amd-advanced-micro-devices.html' title='AMD (Advanced Micro Devices)'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/SUlP6guLxPI/AAAAAAAAACM/qQ8C8dDOyFk/s72-c/AMD2.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-4405959719314311181</id><published>2008-12-17T15:16:00.001+05:00</published><updated>2008-12-17T15:53:11.880+05:00</updated><title type='text'>Centrino 2</title><content type='html'>At Intel's Centrino 2 launch, one of the guests asked Mooly Eden, Intel's Vice President and General Manager of its Mobile Platforms Group, "technically this is the fifth generation of Centrino, so why is this one Centrino 2?" The answer, to paraphrase, was that Intel wanted the consumer to know that this is the new stuff. In some ways it is, and one can appreciate Intel's desire to make what amounts to a clean break from the previous four Centrino generations and start fresh.&lt;br /&gt;&lt;br /&gt;The fundamental definition of Centrino hasn't changed since its inception; the platform continues to be made up of CPU, chipset, and wireless networking components. In Centrino 2, the processor remains a Core 2 Duo, this time with a 45nm Penryn, up to 6MB of L2 cache, and a 1066MHz front-side bus. The chipset and the wireless networking are the new hotness: Intel's skipped a generation (at least as far as nomenclature is concerned) with the Intel Mobile 45 Express chipset, which brings support for DDR3 to the mobile sector. The wireless component has also been updated to Intel's WiFi Link 5000, which offers support for 802.11n networking. WiMax support is expected in the second half of this year, as well.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Centrino 2's Penryn&lt;/span&gt;&lt;br /&gt;Meet the new Penryn, same as the old Penryn. Centrino 2's 45 Express chipset brings the front-side bus up to 1066MHz, but other than that, this is the same Penryn we've already been playing with for months.&lt;br /&gt;&lt;br /&gt;Leading the mobile Penryn pack is a Core 2 Extreme X9100 processor, which runs at a blistering 3.06GHz on a 1066MHz front-side bus. This chip is intended for hard-core gaming machines, and was demonstrated on a notebook running Assassin's Creed fluidly utilizing a pair of Mobility Radeons in Crossfire.&lt;br /&gt;&lt;br /&gt;If two cores aren't enough for you, Eden let slip that a mobile quad-core CPU will appear before the end of the year with a TDP of just 45W. This chip may have been the most exciting thing announced at the Centrino 2 launch event, although the move to a 1066MHz front-side bus is certainly interesting. With that, Intel's mobile processors are finally up to speed with the first generation of Core 2 Duo desktop CPUs—with the addition of SSE4 support, a 45nm Penryn core, and roughly half the power consumption. That's no small feat considering that the X9100 is roughly as fast as many desktop Penryns already on the market.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;The Mobile 45 Express chipset&lt;/span&gt;&lt;br /&gt;With the Mobile 45 Express chipset comes the aforementioned support for 1066MHz front-side bus speeds, along with DDR3 memory and GM45 mobile integrated graphics.&lt;br /&gt;&lt;br /&gt;DDR3 has struggled to make inroads on the desktop due to its high price when compared with DDR2, and that blunts the appeal of DDR3 support in the Mobile 45. However, DDR3's lower default voltage should be an attractive attribute for mobile applications, and the Mobile 45 should get the memory type's foot in the door with notebook makers. Intel didn't focus much on the chipset's DDR3 support in its presentation, relegating it to little more than a bullet-point.&lt;br /&gt;&lt;br /&gt;Possibly the most interesting element of the mobile 45 express chipset is the GM45—an integrated graphics part that Intel claims offers 70% greater performance than its predecessor in 3DMark06. The X3100 acquitted itself reasonably well in 3DMark06, but unfortunately marred that success with poor or inconsistent performance in actual games, including a need to implement registry hacks to optimize performance with certain titles. The GM45's performance was actually demonstrated on two machines running World of Warcraft: Burning Crusade, but Intel's choice of competition was a curious one. Rather than running the GM45 side by side against the X3100, Intel chose to showcase it against the older GMA 950. The GM45 showed a threefold performance improvement, but going from 5 to 15 frames per second isn't setting the world on fire, even if it was running at what appeared to be 1280x800 with medium detail levels.&lt;br /&gt;&lt;br /&gt;While it's hard to get too excited about the GM45's gaming potential, Intel has introduced a "switchable" graphics feature that will allow the chipset's integrated graphics component to better complement a discrete GPU. As its name implies, switchable graphics allows users to switch a notebook's graphics output seamlessly between discrete graphics chips that should offer superior gaming performance and the GM45, which should be more power-efficient for video playback and desktop applications.&lt;br /&gt;&lt;br /&gt;Intel has also beefed up the graphics component's video decoding capabilities to better compete with AMD's 780G and Nvidia's GeForce 8300. The GM45 features full hardware decode acceleration and post-processing for high-definition video. Eden estimated that the GM45 was capable of providing at least two hours of Blu-ray playback on a single battery charge, although actual run times will of course depend on how the rest of a notebook is configured.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Wi-Fi Link 5000 series&lt;/span&gt;&lt;br /&gt;Intel's WiFi Link 5000 wireless networking brings with it full support for 802.11n, claiming speeds of up to 450Mbps. This new card is being offered in a smaller form factor to allow for integration into ever-shrinking ultraportables, such as the MacBook Air.&lt;br /&gt;&lt;br /&gt;The eventual integration of WiMax into the WiFi Link 5000 is perhaps the most intriguing element to the component. However, the actual WiMax segment of the presentation was largely much ado about nothing. It's hard to get terribly excited about WiMax when the best example provided is the eventual wiring of Baltimore, which according to XOHM's (Sprint Nextel's WiMax brand) president, won't be up until some time in September&lt;br /&gt;&lt;br /&gt;As for whether or not the forthcoming Wi-Fi/WiMax cards will be compatible with the Centrino 2 notebooks already en route, Eden was hesitant to grant the full thumbs up, stating that while support was likely, forward compatibility is tricky stuff.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;vPro&lt;/span&gt;&lt;br /&gt;Intel has bifurcated the Centrino 2 line into Centrino 2 for consumers and Centrino 2 vPro for enterprise and SMB (small and medium business) sectors. vPro adds some fairly interesting wireless remote management technology, including the ability to deploy patches and updates from anywhere, even if the client computer is actually turned off. Unfortunately, the demonstration of that technology was thwarted by a BSOD. It's promising, though, and if the kinks are worked out, the ability to power up a computer remotely to patch and update could be a boon for IT managers.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;A few words from AMD&lt;/span&gt;&lt;br /&gt;Prior to attending the Centrino 2 launch, I received a call from an AMD representative intending to steal a little thunder from Intel. AMD was quick to point out that notebooks based on its new Puma platform are already in circulation, and while this is correct, there don't appear to be many of them. A quick jaunt to Best Buy's website reveals two Puma-based HP models available. There are also a couple of Toshibas updated with die-shrunk 690G chipsets and what appear to be rebadged Turions, but as far as Radeon HD 3200-equipped Pumas go, it's just the two HPs. A visit to Newegg doesn't improve the Puma availability outlook, either. So while AMD did beat Intel to market with its new platform, Puma has hardly swamped retail shelves.&lt;br /&gt;&lt;br /&gt;One thing AMD definitely has over Intel is the Radeon HD 3200, which features the same HD acceleration capabilities as the GM45, with the added benefit of what should be superior 3D performance and better game support. Sure, the 3200 is just an integrated graphics core, but its performance rivals that of budget discrete graphics cards.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-4405959719314311181?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/4405959719314311181/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=4405959719314311181' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4405959719314311181'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/4405959719314311181'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/centrino-2.html' title='Centrino 2'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-1342220305096904763</id><published>2008-12-12T18:10:00.000+05:00</published><updated>2008-12-12T18:14:11.436+05:00</updated><title type='text'>Centrino</title><content type='html'>Centrino is a platform-marketing initiative from Intel. It is not a mobile CPU - rather, the term covers a particular combination of mainboard chipset, mobile CPU and wireless network interface in the design of a laptop. Intel claimed that systems equipped with these technologies should deliver better performance, longer battery life and broad wireless network interoperability.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Marketing&lt;/span&gt;&lt;br /&gt;Intel has reportedly invested US$300 million in Centrino advertising[citation needed]. Because of the ubiquity of the marketing campaign, many consumers mistakenly refer to Pentium M and Intel Core processors as Centrino processor[citation needed]. Many consumers have received the impression that only Centrino provides wireless connectivity in a laptop[citation needed].&lt;br /&gt;&lt;br /&gt;The Centrino marketing program has been widely assumed to be responsible for the success of Intel-based laptop PCs[citation needed].&lt;br /&gt;&lt;br /&gt;To qualify for a Centrino label, laptop vendors must use all three Intel qualified parts under each platform. Using only the processor and chipset will carry the Pentium M, Pentium Dual-Core, Celeron, Intel Core or Intel Core 2 label instead.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Centrino branding&lt;/span&gt;&lt;br /&gt;In order for a smooth platform transition over Centrino 2, and current confusion over Centrino logo, Intel had started to have brand names and logos changed for Napa and Santa Rosa notebook platforms in the second quarter of 2008 onwards. [1]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Notebook implementations&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Carmel platform (2003)&lt;/span&gt;&lt;br /&gt;Industry-watchers initially criticized the Carmel platform for its lack of an IEEE 802.11g-solution, because many independent Wi-Fi chip-makers like Broadcom and Atheros had already started shipping 802.11g products. Intel responded that the IEEE had not finalized the 802.11g standard at the time of Carmel's launch, and that it only wanted to launch products based on a finalized standard. In early 2004, after the finalization of the 802.11g standard, Intel permitted an Intel PRO/Wireless 2200BG to substitute for the 2100. At the same time, they permitted the new Dothan Pentium M to substitute for the Banias Pentium M. Initially, Intel permitted only the 855GM chipset, which did not support external graphics. Later, Intel allowed the 855GME and 855PM chips, which did support external graphics, in Centrino laptops.&lt;br /&gt;&lt;br /&gt;Despite criticisms, the Carmel platform won quick acceptance among OEMs and consumers. Carmel could attain or exceed the performance of older Pentium 4-M platforms, while allowing for laptops to operate for 4 to 5 hours on a 48 W-h battery. Carmel also allowed laptop manufacturers to create thinner and lighter laptops because its components did not dissipate much heat, and thus did not require large cooling systems.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Sonoma platform (2005)&lt;/span&gt;&lt;br /&gt;Intel used Sonoma as the codename for the second-generation Centrino platform, introduced in January 2005.&lt;br /&gt;The Mobile 915 Express chipset, like its desktop version, supports many new features such as DDR2, PCI Express, Intel High Definition Audio, and SATA. Unfortunately, the introduction of PCI Express and faster Pentium M processors causes laptops built around the Sonoma platform to have a shorter battery-life than their Carmel counterparts; Sonoma laptops typically achieve between 3.5-4.6 hours of battery-life on a 53 W-h battery.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Napa platform (2006)&lt;/span&gt;&lt;br /&gt;The codename Napa designates the third-generation Centrino platform, introduced in January 2006 at the Winter Consumer Electronics Show. The platform initially supported Intel Core Duo processors but the newer Core 2 Duo processors were launched and supported in this platform from July 27, 2006 onwards.&lt;br /&gt;Intel uses Centrino Duo branding for laptops with dual-core (Core Duo) and (Core 2 Duo) processors and retains the Centrino name for laptops with single core (Core Solo) processors. Some of the initial Core Duo laptops, are still labeled as Intel Centrino rather than Centrino Duo.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Santa Rosa platform (2007)&lt;/span&gt;&lt;br /&gt;The codename Santa Rosa refers to the fourth-generation Centrino platform, which was released on Wednesday 9 May 2007.&lt;br /&gt;The Santa Rosa platform comes with dynamic acceleration technology, allowing single threaded applications to execute faster. When a single threaded application is running, the CPU can turn off one of its cores and overclock the active core. In this way the CPU maintains the same Thermal Profile as it would when both cores are active. Santa Rosa performs well as a mobile gaming platform due to its ability to switch between single threaded and multithreaded tasks. [5] Other power savings come from an Enhanced Sleep state where both the CPU cores and the chipset will power down.&lt;br /&gt;&lt;br /&gt;The wireless chipset update was originally intended to include WWAN Internet access via HSDPA (3.5G), (codenamed Windigo) co-developed with Nokia [6] [7]. After announcing a working partnership, both later retracted the deal citing the lack of a clear business case for the technology. Support for WiMAX (802.16) was originally scheduled for inclusion in Santa Rosa but appears to have been delayed until Montevina in 2008 [7].&lt;br /&gt;&lt;br /&gt;The Santa Rosa platform is branded as "Centrino Pro" when combined with the enhanced security technologies Intel introduced with vPro and will be called "Centrino Duo" when they are not used. [8]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Montevina platform (2008)&lt;/span&gt;&lt;br /&gt;The codename Montevina refers to the fifth-generation Centrino platform, now formally named Centrino 2 to avoid confusion with previous Centrino platforms. It was scheduled for release at Computex Taipei 2008, which took place on June 3–7, 2008,[9] but was delayed until July 15, due to problems with integrated graphics and wireless certification.[10] Montevina supports Penryn, Intel's 45nm die-shrink version of Core 2 processors.&lt;br /&gt;&lt;br /&gt;The Montevina platform is branded as Centrino 2 vPro when combined with built-in security and manageability features technologies.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Calpella platform (2009)&lt;/span&gt;&lt;br /&gt;The codename Calpella refers to the sixth-generation Centrino platform; it will be competing with the AMD Fusion platform[citation needed]. It will premiere in Q3 2009 with the second iteration of Nehalem processors.[12]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Mobile Internet Device&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Menlow platform (2008)&lt;/span&gt;&lt;br /&gt;On the 2nd of March 2008, Intel introduced the Intel Atom processor[13], formerly codenamed "Menlow", it is a new family of low-power processors designed specifically for Mobile Internet Devices (MIDs). The components are designed with thin, small designs and work together to "enable the best mobile computing and Internet experience" on mobile and low-power devices.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Centrino and Centrino 2 with Intel vPro technology&lt;/span&gt;&lt;br /&gt;Centrino laptops with Intel vPro technology (Santa Rosa platform) and Centrino 2 laptops with Intel vPro technology (Montevina platform) are targeted more for businesses than consumers.[14] These laptops have hardware features that allow a sys-admin to remotely access wired and wireless laptops for maintenance and servicing if the operating system is unresponsive or crashed and, when a laptop is connected to AC power (not on battery power), allow a sys-admin to remotely access the laptop when the system is asleep or laptop power is off.&lt;br /&gt;&lt;br /&gt;Laptops with vPro have the typical dual-core or quad-core processor and wireless features of the Centrino family. The vPro technology built into the chipset adds management, security, and remote-deployment features for: monitoring laptops (protected event logs, access to BIOS settings, out-of-band alerting, protected data storage), maintaining and updating systems (access to protected system information, remote power up, console redirection), repairing systems (remote boot, console redirection, preboot access to BIOS settings, protected events logs), and securing systems (remote power up, hardware filters for network traffic, agent presence checks/triggers, out-of-band alerting).&lt;br /&gt;&lt;br /&gt;The 45 nm Centrino 2 package is based on the Penryn CPU and Q47/Q45 chipset. It includes a better graphics engine (integrated) than Centrino, and three key additional features: Transport Layer Security (TLS) secured communications over an open local area network (LAN) for wired laptops outside the corporate firewall (not supported for wireless states), support for Microsoft Network Access Protection (NAP), and support for out-of-band management and security features in Sx (all sleep states) when the laptop is inside the corporate firewall.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-1342220305096904763?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/1342220305096904763/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=1342220305096904763' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1342220305096904763'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/1342220305096904763'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/centrino.html' title='Centrino'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8665682594813684921</id><published>2008-12-08T18:32:00.002+05:00</published><updated>2008-12-08T18:34:20.808+05:00</updated><title type='text'>Intel Core i7</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Intel_Core_i7"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 247px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/ST0iGTA-FGI/AAAAAAAAACE/0o1uInQyFdg/s320/Core+i7.png" alt="" id="BLOGGER_PHOTO_ID_5277411829926990946" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;Intel Core i7 is a family of three Intel desktop x86-64 processors, the first processors released using the Intel Nehalem microarchitecture and the successor to the Intel Core 2 family. All three models are quad-core processors.[1][2][3][4] The Core i7 identifier applies to the initial family of processors[5][6] codenamed Bloomfield.[7] Intel representatives state that the moniker Core i7 does not have any deeper meaning. The name continues the use of the successful Core brand.[8] Core i7 is manufactured in Costa Rica [9] and was officially launched on November 17, 2008.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;&lt;br /&gt;&lt;br /&gt;Features&lt;/span&gt;&lt;br /&gt;The Nehalema architecture has many new features, some of which are present in the Core i7. The ones that represent significant changes from the Core 2 include:&lt;br /&gt;&lt;br /&gt;   * The new LGA 1366 socket is incompatible with earlier processors.&lt;br /&gt;   * On-die memory controller: the memory is directly connected to the processor.&lt;br /&gt;         o Three channel memory: each channel can support one or two DDR3 DIMMs. Motherboards for Core i7 have four (3+1) or six DIMM slots instead of two or four, and DIMMs should be installed in sets of three, not two.&lt;br /&gt;         o Support for DDR3 only.&lt;br /&gt;         o No ECC support.&lt;br /&gt;   * The front side bus is replaced by QuickPath interface. Motherboards must use a chipset that supports QuickPath. As of 5 December 2008 (2008 -12-05)[update], Intel, EVGA, ASUS, MSI, Foxconn, Supermicro, and Gigabyte have all released X58 motherboards, all supporting the i7's LGA1366 Socket interface.&lt;br /&gt;   * Single-die device: all four cores, the memory controller, and all cache are on a single die.&lt;br /&gt;   * "Turbo Boost" technology allows all active cores to intelligently clock themselves up in steps of 133 MHz over the design clock rate as long as the CPU's predetermined thermal and electrical requirements are still met.[11] This mode isn't enabled when the CPU is manually over-clocked by the user.&lt;br /&gt;   * Re-implemented Hyper-threading. Each of the four cores can process two threads simultaneously, so the processor appears to the OS as eight CPUs. This feature was present in the older NetBurst architecture but was dropped in Core.&lt;br /&gt;   * On-die, shared, inclusive 8MB L3 cache.&lt;br /&gt;   * Only one QuickPath interface: not intended for multi-processor motherboards.&lt;br /&gt;   * 45nm process technology.&lt;br /&gt;   * 731M transistors.&lt;br /&gt;   * Sophisticated power management can place an unused core in a zero-power mode&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Drawbacks&lt;/span&gt;&lt;br /&gt;The Core i7 does not support error-correcting memory.&lt;br /&gt;Some high-end motherboards that support the Core i7 advertise support for ECC memory, for example Supermicro's C7X58 and X8SAX (for example, see Supermicro's X8SAX page), however, in the same motherboard manuals, it is made clear that ECC is only supported if the CPU have the feature enabled.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Processors&lt;/span&gt;&lt;br /&gt;   * The clock rates listed here are as specified by Intel for normal mode. "Turbo boost" can increase the rate on active cores in steps of 133 MHz up to a predetermined limit for short periods when required.&lt;br /&gt;   * The 965 XE has separate unlocked multipliers for memory and cores.&lt;br /&gt;         o Core clock above those in the table are not guaranteed by Intel.[2] Rates above 5GHz have been reported.&lt;br /&gt;         o Memory rates above those in the table are not guaranteed by Intel.[2] Rates above DDR3-2000 have been reported.&lt;br /&gt;   * The processor has a Thermal Design Power of 130W and will slow itself down if this power is exceeded. This feature can be disabled from an option in most of the new motherboards' BIOS.[12]&lt;br /&gt;   * Prices are per unit in lots of 1,000 in USD&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Performance&lt;/span&gt;&lt;br /&gt;   * In some benchmarks using overclocking techniques, core clocks of up to 4GHz have been reported, but are not supported by Intel[14]&lt;br /&gt;         o IT OC Taiwan overclocked the chip, which sports an unlocked multiplier, to a respectable 4.20 GHz, at a QPI speed of 200 MHz, and multiplier value of 21.0x. A vCore setting of 1.72 V was used, which is above the danger-mark, taking Intel's own warnings into account.[15]&lt;br /&gt;&lt;br /&gt;A 2.93 GHz Core i7 940 system has been used to run a 3DMark Vantage benchmark and gave a CPU score of 17,966.[16] The 2.66 GHz Core i7 920 scores 16,294. An earlier generation Core processor, the very expensive 3.20 GHz Intel Core 2 Extreme QX9770, scores 13,182. Another one, the 2.66 GHz Core 2 Quad Q9450, scores 11,131.[17]&lt;br /&gt;&lt;br /&gt;AnandTech tested the Intel QuickPath Interconnect (4.8 GT/s version) and found the copy bandwidth using triple-channel 1066 MHz DDR3 was 12.0 GB/s. A 3.0 GHz Core 2 Quad system using dual-channel 1066 MHz DDR3 achieved 6.9 GB/s.[18]&lt;br /&gt;&lt;br /&gt;Over-clocking will be possible with the 900 series and a motherboard equipped with the X58 chipset. In early October 2008, reports surfaced that it will not be possible to use "performance" DDR3 DIMMs that require voltages higher than 1.65v, because the integrated memory controller within the Core i7 will be damaged.[19] Some tests, however, have demonstrated that the voltage limit does not apply, like on a MSI board, and manufacturers can choose to bond CPU voltage to memory or not. By the end of that month, performance memory vendors had announced 1.65v DDR3 memory kits with clock rates up to 2GHz.&lt;br /&gt;&lt;br /&gt;Some early articles suggested that i7's design is not ideal for gaming performance. In a test done on leaked hardware, a Core i7 940 compared to a QX9770 shows the Core i7 is slower than Yorkfield clock for clock in 2 while being faster in the other two. The difference in all cases is small, and is due to the significantly smaller sized L2 cache on the processor cores, with each core able to access its own 256 kB of L2 cache. In contrast, the most recent Yorkfields have up to 12 MB of L2 cache. To help compensate, the Core i7 also has a new L3 cache of 8 MB, shared among all four cores, similar to AMD's "Barcelona" processors.[20] However, more recent testing done on all clock rates of official hardware with final drivers and BIOS revisions show that Core i7 at the very least beats Yorkfield clock-for-clock, and in most cases exceeds it by an average of about 17%.[21] But when it comes to high-end multi-GPU environments (Nvidia 3-way SLI and ATI Crossfire X), the i7 is revealed to be a lot faster than Yorkfield (QX9770) in clock-for-clock.[22] In the single-threaded Super PI 1M test, a Core i7 920 running at 2.66 GHz finished the test in 15.36 seconds, while a QX9770 (3.2 GHz) did the test in 14.42 seconds[23], so the Core i7 executed 20% more instructions per clock cycle on this test.&lt;br /&gt;&lt;br /&gt;The Core i7 has three memory channels, and the channel bandwidth can be selected by setting the memory multiplier. However, in early benchmarks, when the clock rate is set higher than a threshold (1333 for the 965XE) the processor will only access two memory channels simultaneously. A 965XE has higher memory throughput with 3xDDR3-1333 than with 3xDDR3-1600, and 2xDDR3-1600 has almost identical throughput to 3xDDR3-1600.[14]&lt;br /&gt;&lt;br /&gt;Since the Core i7 is a quad-core processor, Hyperthreading cannot yield any performance improvement for application workloads with fewer than five simultaneous threads when all the cores are fully powered on, and some applications will suffer a performance degradation when hyperthreading is enabled.[24] Hyperthreading will provide its best improvement when the workload has eight or more simultaneous threads.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Overclocking&lt;/span&gt;&lt;br /&gt;The process of overclocking the Core i7 architecture is similar to that of the AMD architecture due to the on-die MCH. As of December 2008, the highest clockspeed attained with the Core i7 (965 XE) is 5510 MHz.[26]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8665682594813684921?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8665682594813684921/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8665682594813684921' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8665682594813684921'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8665682594813684921'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/intel-core-i7.html' title='Intel Core i7'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/ST0iGTA-FGI/AAAAAAAAACE/0o1uInQyFdg/s72-c/Core+i7.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-6283588051756028593</id><published>2008-12-04T21:25:00.005+05:00</published><updated>2008-12-04T21:43:20.949+05:00</updated><title type='text'>Itanium</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Itanium"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 95px; height: 109px;" src="http://4.bp.blogspot.com/_osm1u2yPFJw/STgFWpe3skI/AAAAAAAAAB8/B2ws3Fzgaec/s320/Itanium.png" alt="" id="BLOGGER_PHOTO_ID_5275972850115129922" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.&lt;br /&gt;&lt;br /&gt;Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, in which the compiler makes the decisions about which instructions to execute in parallel. By contrast, other superscalar architectures depend on elaborate processor circuitry to keep track of instruction dependencies during runtime. This alternative approach helps current Itanium processors execute up to six instructions per clock cycle.&lt;br /&gt;&lt;br /&gt;After a protracted development process, the first Itanium processor, codenamed Merced, was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007[update], Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC.[1] Intel released its newest Itanium, codenamed Montvale, in November 2007,[2] and has announced plans to release a quad-core Itanium processor (code-named Tukwila) to server OEMs in late 2008. Systems based on the new processor are expected to be available in early 2009,[3] more than a year later than Intel's initial projection.[4]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;History&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Development: 1989–2001&lt;/span&gt;&lt;br /&gt;In 1989, HP determined that reduced instruction set computer (RISC) architectures were approaching a processing limit at one instruction per cycle. HP researchers investigated a new architecture, later named explicitly parallel instruction computing (EPIC), that allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel.[7] The goal of this approach is two-fold: first, to enable deeper inspection of the code to identify additional opportunities for parallel execution; and, second, to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.&lt;br /&gt;&lt;br /&gt;HP determined that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so HP partnered with Intel in 1994 to develop the IA-64 architecture, which derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.[7]&lt;br /&gt;&lt;br /&gt;During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computer (CISC) architectures for all general-purpose applications. Compaq and Silicon Graphics decided to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.[8]&lt;br /&gt;&lt;br /&gt;Several groups developed operating systems for the architecture, including Microsoft Windows, Linux, and UNIX variants such as HP-UX, Solaris,[9] [10] [11] Tru64 UNIX,[8] and Monterey/64[12] (the latter three were canceled before reaching the market). By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of Merced began slipping.[13] Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches. There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities. Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more research was needed.&lt;br /&gt;&lt;br /&gt;Intel announced the official name of the processor, Itanium, on October 4, 1999.[14] Within hours the name Itanic [15] had been coined in an online chat room, a reference to Titanic, the "unsinkable" ocean liner which sank in 1912. Itanic has since often been used by The Register,[16] Scott McNealy,[17] and others,[18][19] implying that the multibillion dollar investment in Itanium—and the tremendous early hype—would be followed by its relatively quick demise.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Original Itanium processor: 2001–02&lt;/span&gt;&lt;br /&gt;By the time Itanium was released in June, 2001, it was no longer superior to contemporaneous RISC and CISC processors. Itanium competed at the low-end (primarily 4-CPU and smaller systems) with servers based on x86 processors, and at the high end with IBM's POWER architecture and Sun Microsystems' SPARC architecture. Intel repositioned Itanium to focus on high-end business and HPC computing, attempting to duplicate x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing PA-RISC and Alpha in HP systems and MIPS in SGI's HPC systems, though IBM also delivered a supercomputer based on this processor.[20] POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space. With economies of scale fueled by its enormous installed base, x86 has remained the preeminent "horizontal" architecture in enterprise computing.&lt;br /&gt;&lt;br /&gt;Only a few thousand systems using the original Itanium processor were sold, due to relatively poor performance, high cost and limited software availability.[21] Recognizing that the lack of software could be a serious issue moving forward, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to market a year later.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Itanium 2 processors: 2002–present&lt;/span&gt;&lt;br /&gt;The Itanium 2 processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The initial Itanium 2 was codenamed McKinley. McKinley was manufactured using a 180 nm process technology, and relieved many of the performance problems of the original Itanium processor.[22]&lt;br /&gt;&lt;br /&gt;In 2003, AMD released the Opteron, which implemented its 64-bit architecture (x86-64). Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Intel responded by implementing x86-64 in its Xeon microprocessors in 2004.[8] Intel released a new Itanium 2 family member, codenamed Madison, in 2003. Madison used a 130 nm process and was the basis of all new Itanium processors until Montecito was released in June 2006.&lt;br /&gt;&lt;br /&gt;In March, 2005, Intel announced that it was working on a new Itanium processor, codenamed Tukwila, to be released in 2007. Tukwila would have four processor cores and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon processor.[4] Intel later said that Tukwila would be delivered in late 2008.[23]&lt;br /&gt;&lt;br /&gt;In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate software porting.[24] The Alliance announced that its members would invest $10 Billion in Itanium solutions by the end of the decade.[25]&lt;br /&gt;&lt;br /&gt;In 2006, Intel delivered Montecito, a dual-core processor that roughly doubled performance and decreased energy consumption by about 20 percent. Quad-core Tukwila processors are still expected to be available to OEMs in late 2008, with systems reaching the marketplace in early 2009.[3]&lt;br /&gt;&lt;br /&gt;In comparison with its Xeon family of server processors, Itanium is not a high-volume product for Intel. Intel does not release production numbers, but one industry analyst estimated that the production rate was 200,000 processors per year in 2007.[26] According to Gartner Inc., the total number of Itanium servers sold by all vendors in 2007 was about 55,000. This compares with 417,000 RISC servers (spread across all RISC vendors) and 8.4 million x86 servers. From 2001 through 2007, IDC reports that a total of 184,000 Itanium-based systems have been sold. For the combined POWER/SPARC/Itanium systems market, IDC reports that POWER captured 42% and SPARC captured 32%, while Itanium-based system revenue reached 26% in the second quarter of 2008.[27] According to an IDC analyst, HP currently accounts for perhaps 80% of Itanium systems revenue.[28]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Architecture&lt;/span&gt;&lt;br /&gt;Intel has extensively documented the Itanium instruction set and microarchitecture,[29] and the technical press has provided overviews.[30][13] The architecture has been renamed several times during its history. HP originally called it PA-WideWord. Intel later called it IA-64, then Itanium Processor Architecture (IPA),[31] before settling on Intel Itanium Architecture, but it is still widely referred to as IA-64. It is a 64-bit register-rich explicitly-parallel architecture. The base data word is 64 bits, byte-addressable. The logical address space is 264 bytes. The architecture implements predication, speculation, and branch prediction. It uses a hardware register renaming mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture.&lt;br /&gt;&lt;br /&gt;The architecture implements 128 integer registers, 128 floating point registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Instruction execution&lt;/span&gt;&lt;br /&gt;Each 128-bit instruction word contains three instructions, and the fetch mechanism can read up to two instruction words per clock from the L1 cache into the pipeline. When the compiler can take maximum advantage of this, the processor can execute six instructions per clock cycle. The processor has thirty functional execution units in eleven groups. Each unit can execute a particular subset of the instruction set, and each unit executes at a rate of one instruction per cycle unless execution stalls waiting for data. While not all units in a group execute identical subsets of the instruction set, common instructions can be executed in multiple units.&lt;br /&gt;&lt;br /&gt;The execution unit groups include:&lt;br /&gt;&lt;br /&gt; * Six general-purpose ALUs, two integer units, one shift unit&lt;br /&gt; * Four data cache units&lt;br /&gt; * Six multimedia units, two parallel shift units, one parallel multiply, one population count&lt;br /&gt; * Two floating-point multiply-accumulate units, two "miscellaneous" floating-point units&lt;br /&gt; * Three branch units&lt;br /&gt;&lt;br /&gt;The compiler can often group instructions into sets of six that can execute at the same time. Since the floating-point units implement a multiply-accumulate operation, a single floating point instruction can perform the work of two instructions when the application requires a multiply followed by an add: this is very common in scientific processing. When it occurs, the processor can execute four FLOPs per cycle. For example, the 800 MHz Itanium had a theoretical rating of 3.2 GFLOPS and the fastest Itanium 2, at 1.67 GHz, was rated at 6.67 GFLOPS&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Memory architecture&lt;/span&gt;&lt;br /&gt;From 2002 to 2006, Itanium 2 processors shared a common cache hierarchy. They had 16 KB[32] of Level 1 instruction cache and 16 KB of Level 1 data cache. The L2 cache was unified (both instruction and data) and is 256 KB. The Level 3 cache was also unified and varied in size from 1.5 MB[32] to 24 MB. The 256 KB L2 cache contains sufficient logic to handle semaphore operations without disturbing the main arithmetic logic unit (ALU).&lt;br /&gt;&lt;br /&gt;Main memory is accessed through a bus to an off-chip chipset. The Itanium 2 bus was initially called the McKinley bus, but is now usually referred to as the Itanium bus. The speed of the bus has increased steadily with new processor releases. The bus transfers 2x128 bits per clock cycle, so the 200 MHz McKinley bus transferred 6.4 GB/s[33] and the 533 MHz Montecito bus transfers 17.056 GB/s.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Architectural changes&lt;/span&gt;&lt;br /&gt;Itanium processors released prior to 2006 had hardware support for the IA-32 architecture to permit support for legacy server applications, but performance for IA-32 code was much worse than for native code and also worse than the performance of contemporaneous x86 processors. In 2005, Intel developed the IA-32 Execution Layer (IA-32 EL), a software emulator that provides better performance. With Montecito, Intel therefore eliminated hardware support for IA-32 code.&lt;br /&gt;&lt;br /&gt;In 2006, with the release of Montecito, Intel made a number of enhancements to the basic processor architecture including:[35]&lt;br /&gt;&lt;br /&gt; * Hardware Multithreading: Each processor core maintains context for two threads of execution. When one thread stalls during memory access, the other thread can execute. Intel calls this "coarse multithreading" to distinguish it from the "hyperthreading technology" Intel integrated into some x86 and x86-64 microprocessors. Coarse multithreading is well matched to the Intel Itanium Architecture and results in an appreciable performance gain.&lt;br /&gt; * Hardware Support for Virtualization: Intel added Intel Virtualization Technology (Intel VT), which provides hardware assists for core virtualization functions. Virtualization allows a software "hypervisor" to run multiple operating system instances on the processor concurrently.&lt;br /&gt; * Cache Enhancements: Montecito added a split L2 cache, which included a dedicated 1 MB L2 cache for instructions. The original 256 KB L2 cache was converted to a dedicated data cache. Montecito also included up to 12MB of on-die L3 cache.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Hardware support&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Systems&lt;/span&gt;&lt;br /&gt;As of 2008, several manufacturers offer Itanium systems, including HP, SGI, NEC, Fujitsu, Unisys, Hitachi, and Groupe Bull. In addition, Intel offers a chassis[36] that can be used by system integrators to build Itanium systems. HP, the only one of the industry's top four server manufacturers to offer Itanium-based systems today, manufactures at least 80% of all Itanium systems. HP sold 7200 systems in the first quarter of 2006.[37] The bulk of systems sold are enterprise servers and machines for large-scale technical computing, with an average selling price per system in excess of US$200,000. A typical system uses eight or more Itanium processors.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Chipsets&lt;/span&gt;&lt;br /&gt;The Itanium bus interfaces to the rest of the system via a chipset. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. Currently, modern chipsets for Itanium are manufactured by HP, Fujitsu, SGI, NEC, Hitachi, and Unisys. IBM created a chipset in 2003, and Intel in 2002, but neither of them has developed chipsets to support newer technologies such as DDR2 or PCI Express.[38]&lt;br /&gt;&lt;br /&gt;The upcoming Itanium processor (Tukwila) has been designed to share a common chipset with the Intel Xeon processor EX (Intel’s Xeon processor designed for four processor and larger servers). The goal is to provide system development and cost-saving synergies for server OEMs, many of whom develop both Itanium- and Xeon-based servers.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Software support&lt;/span&gt;&lt;br /&gt;In order to allow more software to run on the Itanium, Intel supported the development of effective compilers for its platform, especially its own suite of compilers.[39][40] GCC,[41][42] Open64 and MS Visual Studio 2005 (and later)[43] are also able to produce machine code for Itanium. As of 2008, Itanium is supported by Windows Server 2003 and Windows Server 2008, multiple Linux distributions (including Debian, Red Hat and Novell SuSE), FreeBSD,[44] and HP-UX, OpenVMS, and NonStop from HP, all natively. HP also sells a virtualization technology for Itanium called Integrity Virtual Machines. Itanium also supports mainframe environment GCOS from Groupe Bull and several IA-32 operating systems via Instruction Set Simulators. Using QuickTransit, application binary software for IRIX/MIPS and Solaris/SPARC can run via "dynamic binary translation" on Linux/Itanium. According to the Itanium Solutions Alliance, as of early 2008, over 13,000 applications are available for Itanium based systems,[45] though Sun has contested Itanium application counts in the past.[46] The ISA also supports Gelato, an Itanium HPC user group and developer community that ports and supports open source software for Itanium.[47]&lt;br /&gt;&lt;br /&gt;The software requirements for Itanium were criticized by Donald Knuth who said: "... The Itanium approach ... was supposed to be so terrific—until it turned out that the wished-for compilers were basically impossible to write" [1].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Competition&lt;/span&gt;&lt;br /&gt;The Itanium 2 competes in the enterprise server and high-performance computing (HPC) markets. Itanium's major competitors include Sun Microsystems' UltraSPARC IV+, Fujitsu's SPARC64, IBM's POWER6, AMD's Opteron, and Intel's own Xeon servers.&lt;br /&gt;&lt;br /&gt;Throughout its history, Itanium has had the best floating point performance relative to fixed-point performance of any general-purpose microprocessor. This capability is useful in HPC systems but is not needed for most enterprise server workloads.[citation needed]&lt;br /&gt;&lt;br /&gt;By 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage has declined as the industry shifts to x86-64 clusters for this application.[48]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Supercomputers &amp;amp; HPC&lt;/span&gt;&lt;br /&gt;An Itanium-based computer first appeared on list of the TOP500 supercomputers in November 2001.[20] The best position ever achieved by an Itanium 2 based system in the list was #2, achieved in June 2004, when Thunder (LLNL) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by November 2008, this had dropped to nine systems (1.8%).[49]&lt;br /&gt;&lt;br /&gt;New Itanium implementations in high performance computing (HPC) are primarily for research areas (such as biochemical research) where typical workloads perform better on large, shared memory systems rather than distributed clusters. These systems typically have 16 to 64 processors, and are not comparable in size to the supercomputers on the TOP500 list.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Processors&lt;/span&gt; &lt;span style="font-weight: bold;"&gt;Released processors&lt;/span&gt;&lt;br /&gt;The Itanium processors show a steady progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667 MHz.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-6283588051756028593?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/6283588051756028593/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=6283588051756028593' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6283588051756028593'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/6283588051756028593'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/itanium.html' title='Itanium'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://4.bp.blogspot.com/_osm1u2yPFJw/STgFWpe3skI/AAAAAAAAAB8/B2ws3Fzgaec/s72-c/Itanium.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-569497449331815161</id><published>2008-12-03T20:18:00.002+05:00</published><updated>2008-12-03T20:33:53.919+05:00</updated><title type='text'>Xeon</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Xeon"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 214px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/STamO_kfJOI/AAAAAAAAABs/cyOnYqTalv4/s320/Xeon.png" alt="" id="BLOGGER_PHOTO_ID_5275586790023963874" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Xeon brand refers to many families of Intel's x86 multiprocessing CPUs – for dual-processor (DP) and multi-processor (MP) configuration on a single motherboard targeted at non-consumer markets of server and workstation computers, and also at blade servers and embedded systems. The Xeon brand has been maintained over several generations of x86 and x86-64 processors. Older models added the Xeon moniker to the end of the name of their corresponding desktop processor, but more recent models used the name Xeon on its own. The Xeon CPUs generally have more cache than their desktop counterparts in addition to multiprocessing capabilities. Intel's (non-x86) IA-64 processors are called Itanium, not Xeon.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Pentium II Xeon&lt;/span&gt;&lt;br /&gt;The first Xeon branded processor was released in 1998, named the Pentium II Xeon (codenamed "Drake"), as the replacement of the Pentium Pro. It was based on the 0.25 µm "Deschutes" core (P6 microarchitecture) branded Pentium II (sharing its 80523 product code), used either a 440GX (a dual-processor workstation chipset) or 450NX (quad-processor, or oct with additional logic) chipset, and differed from the Pentium II desktop CPU (Deschutes) in that its off-die L2 cache ran at full speed. It also used a larger slot known as slot 2. Cache sizes were 512 KB, 1 MB, and 2 MB, and it used a 100 MT/s front side bus (FSB)[1].&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Pentium III Xeon&lt;/span&gt;&lt;br /&gt;In 1999, the Pentium II Xeon was replaced by the Pentium III Xeon. Reflecting the incremental changes from the Pentium II "Deschutes" core to the Pentium III "Katmai" core, the first Pentium III Xeon, named "Tanner", was just like its predecessor except for the addition of Streaming SIMD Extensions (SSE) and a few cache controller improvements. The second version, named "Cascades", was based on the Pentium III "Coppermine" core. The "Cascades" Xeon used a 133 MT/s bus and relatively small 256 KB on-die L2 cache resulting in almost the same capabilities as the Slot 1 Coppermine processors, which were capable of dual-processor operation but not quad-processor operation. To improve this situation, Intel released another version, officially also named "Cascades", but often referred to as "Cascades 2 MB". That came in two variants: with 1 MB or 2 MB of L2 cache. Its bus speed was fixed at 100 MT/s, though in practice the cache was able to offset this. Product codes for Tanner and Cascades mirrored that of Katmai and Coppermine; 80525 and 80526 respectively.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Xeon (DP) &amp;amp; Xeon MP (32-bit)&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Foster&lt;/span&gt;&lt;br /&gt;In mid-2001, the Xeon brand was introduced ("Pentium" was dropped from the name). The initial variant that used the new NetBurst architecture, "Foster", was slightly different from the desktop Pentium 4 ("Willamette"). It was a decent chip for workstations, but for server applications it was almost always outperformed by the older Cascades 2 MB core and AMD's Athlon MP. Combined with the need to use expensive Rambus Dynamic RAM, the Foster's sales were somewhat unimpressive.&lt;br /&gt;&lt;br /&gt;At most two Foster processors could be accommodated in a symmetric multiprocessing (SMP) system built with a mainstream chipset, so a second version (Foster MP) was introduced with a 1 MB L3 cache and the Jackson Hyper-Threading capacity. This improved performance slightly, but not enough to lift it out of third place. It was also priced much higher than the dual-processor (DP) versions. The Foster shared the 80528 product code with Willamette.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Prestonia&lt;/span&gt;&lt;br /&gt;In 2002 Intel released a 130 nm version of Xeon branded CPU, codenamed "Prestonia". It supported Intel's new Hyper-Threading technology and had a 512 KB L2 cache. This was based on the "Northwood" Pentium 4 core. A new server chipset, E7500 (which allowed the use of dual-channel DDR SDRAM) was released to support this processor in servers, and soon the bus speed was boosted to 533 MT/s (accompanied by new chipsets: the E7501 for servers and the E7505 for workstations). The Prestonia performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP branded CPUs (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Gallatin&lt;/span&gt;&lt;br /&gt;Subsequent to the Prestonia was the "Gallatin", which had an L3 cache of 1 MB or 2 MB. Its Xeon MP version also performed much better than the Foster MP, and was popular in servers. Later experience with the 130 nm process allowed Intel to create the Xeon MP branded Gallatin with 4 MB cache. The Xeon branded Prestonia and Gallatin were designated 80532, like Northwood.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Xeon (DP) &amp;amp; Xeon MP (64-bit)&lt;/span&gt;&lt;br /&gt;Due to a lack of success with Intel's Itanium and Itanium 2 processors, AMD was able to introduce x86-64, a 64-bit extension to the x86 architecture. Intel followed suit by including EM64T (almost identical) in the 90 nm version of the Pentium 4 ("Prescott"), and a Xeon version codenamed "Nocona" was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for PCI Express, DDR-II and Serial ATA. The Xeon was noticeably slower than AMD's Opteron, although it could be faster in situations where Hyper-Threading came into play.&lt;br /&gt;&lt;br /&gt;A slightly updated core called "Irwindale" was released in early 2005, with twice the L2 cache of Nocona and able to reduce its clockspeeds during low processor demand. However, independent tests showed that AMD's Opteron still outperformed Irwindale.&lt;br /&gt;&lt;br /&gt;64-bit Xeon MPs were introduced in April 2005. The cheaper "Cranford" was an MP version of Nocona, while the more expensive "Potomac" was a Cranford with 8 MB of L3 cache. All these Prescott-derived Xeons have the product code 80546.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Dual-Core Xeon&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;"Paxville DP"&lt;/span&gt;&lt;br /&gt;The first dual-core CPU branded Xeon, codenamed Paxville DP, product code 80551, was released by Intel on 10 October 2005. Paxville DP had NetBurst architecture, and was a dual-core equivalent of the single-core Irwindale (related to the Pentium D branded "Smithfield"") with 4 MB of L2 Cache (2 MB per core). The only one Paxville DP model released ran at 2.8 GHz, featured an 800 MT/s front side bus, and was produced using a 90 nm process.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;7000-series "Paxville MP"&lt;/span&gt;&lt;br /&gt;An MP-capable version of Paxville DP, codenamed Paxville MP, product code 80560, was released on 1 November 2005. There are two versions: one with 2 MB of L2 Cache (1 MB per core), and one with 4 MB of L2 (2 MB per core). Paxville MP, called the dual-core Xeon 7000-series, was produced using a 90 nm process. Paxville MP clock ranges between 2.67 GHz and 3.0 GHz (model numbers 7020-7041), with some models having a 667 MT/s FSB, and others having an 800 MT/s FSB.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;LV (ULV), "Sossaman"&lt;/span&gt;&lt;br /&gt;On 14 March 2006, Intel released a dual-core processor codenamed Sossaman and branded as Xeon LV (low-voltage). Subsequently an ULV (ultra-low-voltage) version was released. The Sossaman was a low-/ultra-low-power and double-processor capable CPU (like AMD Quad FX), based on the "Yonah" processor, for ultradense non-consumer environment (i.e. targeted at the blade-server and embedded markets), and it was rated at a thermal design power (TDP) of 31 W (LV: 1.66 GHz and 2 GHz ) and 15 W (ULV: 1.66 GHz)[2]. As such, it supported most of the same features as earlier Xeons: Virtualization Technology, 667 MT/s front side bus, and dual-core processing, but it did not support 64-bit operations, so it could not run 64-bit-only server software, such as Microsoft Exchange Server 2007, and therefore it was limited to only 16 GB of memory. A planned successor, codenamed "Merom MP" was to be a drop-in upgrade to allow Sossaman-based servers to upgrade to 64-bit capability. However, this was abandoned in favour of low-voltage versions of the Woodcrest LV processor leaving the Sossaman at a dead-end with no planned upgrades.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;5000-series "Dempsey"&lt;/span&gt;&lt;br /&gt;On 23 May 2006, Intel released the dual-core CPU (Xeon branded 5000 series) codenamed Dempsey (product code 80555). Released as the Dual-Core Xeon 5000-series, Dempsey is a NetBurst architecture processor produced using a 65 nm process, and is virtually identical to Intel's "Presler" Pentium Extreme Edition, except for the addition of SMP support, which lets Dempsey operate in dual-processor systems. Dempsey ranges between 2.50 GHz and 3.73 GHz (model numbers 5020-5080). Some models have a 667 MT/s FSB, and others have a 1066 MT/s FSB. Dempsey has 4 MB of L2 Cache (2 MB per core). A Medium Voltage model, at 3.2 GHz and 1066 MT/s FSB (model number 5063), has also been released. Dempsey also introduces a new interface for Xeon processors: Socket J, also known as LGA 771.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;5100-series "Woodcrest"&lt;/span&gt;&lt;br /&gt;On 26 June 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed Woodcrest (product code 80556); it was the first Intel Core microarchitecture processor to be launched on the market. It is a server and workstation version of the Intel Core 2 processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.&lt;br /&gt;&lt;br /&gt;Most models have a 1333 MT/s FSB, except for the 5110 and 5120, which have a 1066 MT/s FSB. The fastest processor (5160) operates at 3.0 GHz. All Woodcrests use LGA 771 and all except two models have a TDP of 65 W. The 5160 has a TDP of 80 W and the 5148LV (2.33 GHz) has a TDP of 40 W. The previous generation Xeons had a TDP of 130 W. All models support Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, with the "Demand Based Switching" power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4 MB of shared L2 Cache.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;7100-series "Tulsa"&lt;/span&gt;&lt;br /&gt;Released on 29 August 2006,[3] the 7100 series, codenamed Tulsa (product code 80550), is an improved version of Paxville MP, built on a 65 nm process, with 2 MB of L2 cache (1 MB per core) and up to 16 MB of L3 cache. It uses Socket 604 [1]. Tulsa was released in two lines: the N-line uses a 667 MT/s FSB, and the M-line uses an 800 MT/s FSB. The N-line ranges from 2.5 GHz to 3.5 GHz (model numbers 7110N-7150N), and the M-line ranges from 2.6 GHz to 3.4 GHz (model numbers 7110M-7140M). L3 cache ranges from 4 MB to 16 MB across the models.[4]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;7200-series "Tigerton"&lt;/span&gt;&lt;br /&gt;The 7200 series, codenamed Tigerton (product code 80564) is an MP-capable processor, similar to the 7300 series, but, in contrast, only one core is active on each silicon chip, and the other one is turned off (blocked), resulting as a dual-core capable processor.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;3000-series "Conroe"&lt;/span&gt;&lt;br /&gt;The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU,[5] released at the end of September 2006, was just a rebranded version of the Intel's mainstream Conroe, otherwise branded as Core 2 Duo (for consumer desktops). Unlike most Xeon processors, they only supported single-CPU operation. They use Socket T (LGA775), operate on a 1066 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Intel Processors with a number ending in "5" have a 1333 MT/s FSB.[6]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;3100-series "Wolfdale"&lt;/span&gt;&lt;br /&gt;The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just rebranded version of the Intel's mainstream Wolfdale featuring the same 45 nm process and 6 MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use Socket T (LGA775), operate on a 1333 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;5200-series "Wolfdale DP"&lt;/span&gt;&lt;br /&gt;On 11 November 2007, Intel released the dual-core CPU (Xeon branded 5200 series) codenamed Wolfdale DP (product code 80573),[8] it is built on a 45 nm process like the desktop Core 2 Duo Wolfdale and the Xeon-SP Wolfdale, featuring Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, it is unclear whether the "Demand Based Switching" power management will be available on the L5238 which is scheduled for April 2008.[9] Wolfdale has 6 MB of shared L2 Cache.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Quad-Core and Multi-Core Xeon&lt;/span&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;3200-series "Kentsfield"&lt;/span&gt;&lt;br /&gt;Intel released relabeled versions of its quad-core (2x2) Core 2 Quad processor as the Xeon 3200-series (product code 80562) on 7 January 2007.[10] The 2x2 "quad-core" (dual-die dual-core[11]) comprised two separate dual-core die next to each other in one CPU package. The models are the X3210, X3220 and X3230, running at 2.13 GHz, 2.4 GHz and 2.66 GHz, respectively.[12] Like the 3000-series, these models only support single-CPU operation and operate on a 1066 MHz front-side bus. It is targeted at the "blade" market.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;3300-series "Yorkfield"&lt;/span&gt;&lt;br /&gt;Intel released relabeled versions of its quad-core (2x2) Core 2 Quad processor as the Xeon 3300-series (product code 80569) comprised two separate dual-core dies next to each other in one CPU package and manufactured in a 45 nm process. The models are the X3320, X3350, X3360 and X3370, running at 2.50 GHz, 2.66 GHz, 2.83 GHz and 3.0 GHz, respectively. The L2 cache is a unified 6 MB per die (except for the X3320 with a smaller 3 MB L2 cache per die), and a front-side bus of 1333 MHz. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as "Demand Based Switching".&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;5300-series "Clovertown"&lt;/span&gt;&lt;br /&gt;A quad-core (2x2) successor of the Woodcrest for DP segment, consisting of two dual-core Woodcrest chips in one package similarly to the dual-core Pentium D branded CPUs (two single-core chips) or the quad-core Kentsfield. The Clovertown has been usually implemented with two Woodcrest dies on a multi-chip module, with 8 MB of L2 cache (4 MB per die). Like Woodcrest, lower models use a 1066 MT/s FSB, and higher models use a 1333 MT/s FSB. Intel released Clovertown, product code 80563, on 14 November 2006[13] with models E5310, E5320, E5335, E5345, and X5355, ranging from 1.6 GHz to 2.66 GHz. The E and X designations are borrowed from Intel's Core 2 model numbering scheme; an ending of -0 implies a 1066 MT/s FSB, and an ending of -5 implies a 1333 MT/s FSB.[12] All models have a TDP of 80 W with the exception of the X5355, which has a TDP of 120 W. A low-voltage version of Clovertown with a TDP of 50 W has a model numbers L5310, L5320 and L5335 (1.6 GHz, 1.86 GHz and 2.0 GHz respectively). The 3.0 GHz X5365 arrived in July 2007, and became available in the Apple Mac Pro [6] on 4 April 2007.[7][14] The X5365 is among the fastest processors, performing up to around 38 GFLOPS in the LINPACK benchmark.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;5400-series "Harpertown"&lt;/span&gt;&lt;br /&gt;On 11 November 2007 Intel presented Yorkfield based Xeons - called Harpertown (product code 80574) - to the public.[9] This family consists of dual die quad-core CPUs manufactured on a 45 nm process and featuring 1333 MHz to 1600 MHz front-side buses, with TDP rated from 50 W to 150 W depending on the model. These processors fit in the LGA771 socket. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as the "Demand Based Switching", except the E5405, which lacks this feature. The supplementary character in front of the model-number represents the thermal rating: an L depicts an TDP of 50 W, an E depicts 80 W whereas a X is 120 W TDP or above. The speed of 3.00 GHz comes as four models, two models with 80 W TDP two other models with 120 W TDP with 1333 MHz or 1600 MHz front-side bus respectively. The fastest Harpertown is the X5492 whose TDP of 150 W is higher than those of the Prescott-based Xeon DP but having twice as many cores. (This CPU is also sold under the name "Core 2 Extreme QX9775" for use in the Intel SkullTrail system.)&lt;br /&gt;&lt;br /&gt;Intel 1600 MHz front-side bus Xeon processors will drop into the Seaburg chipset whereas several mainboards featuring the Intel 5000/5200-chipset are enabled to run the processors with 1333 MHz front-side bus processors. Seaburg features support for dual PCIe 2.0 x16 slots and up to 128 GB of memory.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;7300-series "Tigerton"&lt;/span&gt;&lt;br /&gt;The 7300 series, codenamed Tigerton (product code 80565) is a four-socket (packaged in Socket 604) and greater capable quad-core processor, consisting of two dual core Core2 architecture silicon chips on a single ceramic module, similar to Intel's Xeon 5300 series Clovertown processor modules. It was announced on 5 September 2007 [10], and is currently shipping.&lt;br /&gt;&lt;br /&gt;The 7300 series uses Intel's Caneland (Clarksboro) platform.&lt;br /&gt;&lt;br /&gt;Intel claims the 7300 series Xeons offer more than twice the performance and more than three times the performance per watt as Intel's previous generation 7100 series. The 7300 series' Caneland chipset provides a point to point interface allowing the full front side bus bandwidth per processor.&lt;br /&gt;&lt;br /&gt;The 7xxx series is aimed at the large server market, supporting configurations of up to 32 CPUs per host.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;7400-series "Dunnington"&lt;/span&gt;&lt;br /&gt;Dunnington[17] - the last CPU of the Penryn generation and Intel's first multi-core (above two) die - features a single-die six- (or hexa-) core design with three unified 3 MB L2 caches (resembling three merged 45 nm dual-core Wolfdale dies), and 96 KB L1 cache (Data) and 16 MB of L3 cache. It features 1066 MHz FSB, fits into the Tigerton's mPGA604 socket, and is compatible with the Caneland chipset. These processors support DDR2-1066 (533 MHz), and have a maximum TDP below 130 W. They are intended for blades and other stacked computer systems. Availability is scheduled for the second half of 2008. It will be followed shortly by the Nehalem microarchitecture.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-569497449331815161?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/569497449331815161/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=569497449331815161' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/569497449331815161'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/569497449331815161'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/xeon-brand-refers-to-many-families-of.html' title='Xeon'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/STamO_kfJOI/AAAAAAAAABs/cyOnYqTalv4/s72-c/Xeon.png' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-7259125354721140710</id><published>2008-12-02T13:55:00.000+05:00</published><updated>2008-12-02T13:56:50.561+05:00</updated><title type='text'>Intel A100</title><content type='html'>The Intel processors A100 and A110 are x86 architecture low-power microprocessors (code-named Stealey), with a Dothan core derived from the Intel Pentium M, built on a 90 nm process with 512KB L2 cache and 400MHz front side bus (FSB). The A100/A110 represent the CPU component of the McCaslin platform.[1] They are to be replaced in 2008 by the Menlow platform, including the Silverthorne (Intel Atom) 45nm CPU and Poulsbo chipset.[2]&lt;br /&gt;&lt;br /&gt;The A110 runs at 800MHz, the A100 at 600MHz, and both have a TDP of 3 watts, and a power consumption in the lowest power state of only 0.4 watts.[3]&lt;br /&gt;&lt;br /&gt;The A100 and A110 processors are part of the Intel Ultra Mobile Platform 2007[4] and were designed to be used in MIDs, UMPCs and Ultralight laptops, like the Kohjinsha Convertible Tablet PC.[5]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-7259125354721140710?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/7259125354721140710/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=7259125354721140710' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7259125354721140710'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7259125354721140710'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/intel-a100.html' title='Intel A100'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-670309443710629848</id><published>2008-12-01T12:21:00.003+05:00</published><updated>2008-12-01T12:27:10.753+05:00</updated><title type='text'>Intel Atom</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://1.bp.blogspot.com/_osm1u2yPFJw/STORd9icM9I/AAAAAAAAABk/x422VUm-Lzs/s1600-h/Intel+Atom.jpg"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 100px; height: 123px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/STORd9icM9I/AAAAAAAAABk/x422VUm-Lzs/s320/Intel+Atom.jpg" alt="" id="BLOGGER_PHOTO_ID_5274719532502234066" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;Intel Atom is the brand name for a line of x86 and x86-64 CPUs (or microprocessors) from Intel, previously code-named Silverthorne and Diamondville processors, designed for a 45 nm CMOS process and intended for use in ultra-mobile PCs, smart phone and other portable and low-power applications.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Background&lt;/span&gt;&lt;br /&gt;Prior to the announcement, outside sources had speculated that Silverthorne would have competed with AMD's Geode system-on-a-chip processors, currently used by the One Laptop per Child project, and other cost- and power-sensitive applications for x86 architecture processors. However, Intel revealed on October 15, 2007[1] that it is developing another new mobile processor, codenamed Diamondville, for OLPC-type devices.&lt;br /&gt;&lt;br /&gt;Silverthorne will be sold under the brand name "Atom", while the formerly code-named Menlow platform it sits on will be sold under the brand name Centrino Atom.[2] Intel's Atom press release only mentions "Diamondville" once and seems to imply that it too will be named "Atom".[3] This seems to strengthen speculation that Diamondville is simply a lower-cost, higher-yielding version of Silverthorne with slightly higher TDPs at slightly lower clock speeds.[4]&lt;br /&gt;&lt;br /&gt;At Spring Intel Developer Forum (IDF) 2008 in Shanghai, Intel officially announced that Silverthorne and Diamondville are based on the same microarchitecture. Silverthorne will be called the Atom Z series and Diamondville will be called the Atom N series. The more expensive lower-power Silverthorne parts will be used in Intel Mobile Internet Devices (MIDs) whereas Diamondville will be used in low-cost desktop and notebooks. Several Mini-ITX motherboard samples have also been revealed.[5] Intel and Lenovo also jointly announced an Atom powered MID called the IdeaPad U8.[6] The IdeaPad U8 weighs a mere 280g and has a 4.8" touchscreen providing better portability than a netbook PC and easier Internet viewing than a mobile phone or PDA.&lt;br /&gt;&lt;br /&gt;In April 2008, an MID development kit was announced by Sophia Systems[7] and the first board called CoreExpress was revealed by a German company Lippert.[8][9] Intel offers Atom based motherboards.[10][11]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Availability&lt;/span&gt;&lt;br /&gt;Atom processors became available to system manufacturers in 2008. Atom processors are not yet available to home users or system builders, although they may be obtained preinstalled on some ITX motherboards. The Diamondville Atom is used in the Acer Aspire One and MSI Wind PC netbooks.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Architecture&lt;/span&gt;&lt;br /&gt;Intel Atom can execute up to two instructions per cycle (similar to the 1993 Pentium). Atom implements the x86 (IA-32) instruction set; x86-64 is so far only activated for the Atom 230 and 330 desktop models. N and Z series Atom models cannot run x86-64 code.[12] Like many other designs it divides certain x86-instructions into simpler internal operations prior to execution[citation needed], but to a significantly lesser extent (only ~4%) than in the Intel P6 (microarchitecture) and NetBurst families[citation needed]. In the Atom, internal μ-ops can contain both a memory load and a memory store in connection with an ALU operation, thus being more similar to the x86 level and more powerful than the μ-ops used in previous designs[citation needed]. This enables relatively good performance with only two integer ALUs, and without any instruction reordering, speculative execution, or register renaming. Atom therefore represents a partial revival of the principles used in earlier Intel designs such as Intel P5 and the i486, with the sole purpose of enhancing the performance per watt ratio.&lt;br /&gt;&lt;br /&gt;It has been speculated that the die space used to perform x86-decoding will put the Atom design at a disadvantage compared to other mobile architectures, such as the ARM architecture.[13] The Moorestown platform which is the successor of the Menlow Platform will be a system-on-a-chip design that uses half the power of a Silverthorne processor. The reduced power consumption will make the platform more desirable for use in smartphones and other mobile internet devices.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Power requirements&lt;/span&gt;&lt;br /&gt;While the Atom processor itself is relatively power efficient for an x86 instruction set chip, the chipsets used with it are currently not as power efficient. For example while the N270 chip itself has a maximum TDP of 2.5 W, the Intel Atom platform with the 945GSE Express chipset has a specified maximum TDP of 11.8 W, with the processor only making up a relatively small portion of the total power. Individual figures are 2.5W for the N270 processor, 6W for the 945GSE chipset and 3.3W for the 82801GBM I/O controller.[22][23][24][25] Intel also provides the Intel System Controller Hub US15W chipset with a TDP of less than 5W for the Atom processor Z5xx series.&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Future&lt;/span&gt;&lt;br /&gt;The next generation of the Atom, "Lincroft," architecture will be launched in 2H 2009 and is code-named Pineview. It will be used in Netbook/Nettop systems, and feature a system-on-chip (SOC) with an integrated single-channel DDR2 memory controller and an integrated graphics core. Pineview, like Diamondville, will be available in single and dual-core versions. It will feature HyperThreading, and is to be manufactured on a 45nm[26] or 32 nm [27] process.&lt;br /&gt;&lt;br /&gt;Intel CEO Paul Otellini has stated that, along with other improvements, Atom (specifically Silverthorne) will shrink to the 32 nm process in 2009.[28] It has been suggested that the Atom will be the first Intel chip to transition to 32 nm due to its small size and low complexity.[29]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Competition&lt;/span&gt;&lt;br /&gt;Nvidia launched its Tegra line of processors in June 2008. The performance and power consumption of the Tegra processor is claimed to be better than Intel's Atom[30]. The Nvidia's Tegra CPU offering is based on the ARM RISC architecture, which uses a different instruction set from the x86-32 bit and AMD 64. Because it does not use the same instruction set, programs will have to be compiled specifically for the Tegra processor in order for them to work on it. However, ARM is frequently used in handheld devices, such as PDAs, GPS systems, cell phones, and game systems such as the Nintendo DS. The VIA C7/Nano series is slightly above the average thermal envelope of the Atom, but has hardware AES support, out-of-order execution for the Nano (C7 is an in-order architechture), hardware random number generators. Performance comparisons of the Intel Atom against the Via Nano come to differing conclusions depending on the specific test case and depending which processor from the family is compared. In general terms a single core Intel Atom is outperformed by the Via Nano which is in turn outperformed by a dual core Intel Atom.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-670309443710629848?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/670309443710629848/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=670309443710629848' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/670309443710629848'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/670309443710629848'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/12/intel-atom.html' title='Intel Atom'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://1.bp.blogspot.com/_osm1u2yPFJw/STORd9icM9I/AAAAAAAAABk/x422VUm-Lzs/s72-c/Intel+Atom.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-8796836357015868125</id><published>2008-11-29T13:23:00.002+05:00</published><updated>2008-11-29T13:29:43.888+05:00</updated><title type='text'>Intel Core 2</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Intel_Core_2"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 125px; height: 115px;" src="http://3.bp.blogspot.com/_osm1u2yPFJw/STD8glAuEzI/AAAAAAAAABc/BNRS5iYZVIs/s320/Intel+core+2+duo.jpg" alt="" id="BLOGGER_PHOTO_ID_5273992800271995698" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Core 2 brand refers to a range of Intel's consumer 64-bit dual-core and 2x2 MCM (Multi-Chip Module) quad-core CPUs with the x86-64 instruction set, based on the Intel Core microarchitecture, derived from the 32-bit dual-core Yonah laptop processor. (Note: The Yonah's silicon chip or die comprised two interconnected cores, each similar to those branded Pentium M). The 2x2 MCM dual-die quad-core[1] CPU had two separate dual-core dies (CPUs)—next to each other—in one quad-core MCM package. The Core 2 relegated the Pentium brand to a mid-end market, and reunified laptop and desktop CPU lines, which previously had been divided into the Pentium 4, D, and M brands.&lt;br /&gt;&lt;br /&gt;The Core microarchitecture returned to lower clock rate and improved processors' usage of both available clock cycles and power compared with preceding NetBurst of the Pentium 4/D-branded CPUs.[2] Core microarchitecture provides more efficient decoding stages, execution units, caches, and buses, reducing the power consumption of Core 2-branded CPUs, while increasing their processing capacity. Intel's CPUs have varied very wildly in power consumption according to clock rate, architecture and semiconductor process, shown in the CPU power dissipation tables.&lt;br /&gt;&lt;br /&gt;The Core 2 brand was introduced on July 27, 2006[3] comprising the Solo (single-core), Duo (dual-core), Quad (quad-core), and Extreme (dual- or quad-core CPUs for enthusiasts) branches, during 2007.[4] Intel Core 2 processors with vPro technology (designed for businesses) include the dual-core and quad-core branches.[5]&lt;br /&gt;&lt;br /&gt;&lt;span style="font-weight: bold;"&gt;Duo, Quad, and Extreme&lt;/span&gt;&lt;br /&gt;The Core 2-branded CPUs include: "Conroe" and "Allendale" (dual-core for higher- and lower-end desktops), "Merom" (dual-core for laptops), "Kentsfield" (quad-core for desktops), and their variants named "Penryn" (dual-core for laptops), "Wolfdale" (dual-core for desktops, low-end dual-core for desktops) and "Yorkfield" (quad-core for desktops). (Note: For the server and workstation "Woodcrest", "Clovertown", and "Tigerton" CPUs see the Xeon brand[6].)&lt;br /&gt;&lt;br /&gt;The Core 2 branded processors featured the Virtualization Technology (except T52x0, T5300, T54x0, T55x0 with stepping "B2", E2xx0, E4x00 and E8190 models), Execute Disable Bit, and SSE3. Their Core microarchitecture introduced also SSSE3, Trusted Execution Technology, Enhanced SpeedStep, and Active Management Technology (iAMT2). With a Thermal Design Power (TDP) of up to only 65 W, the Core 2 dual-core Conroe consumed only half the power of less capable, but also dual-core Pentium D-branded desktop chips[7] with a TDP of up to 130 W[8] (a high TDP requires additional cooling that can be noisy or expensive).&lt;br /&gt;&lt;br /&gt;Typical for CPUs, the Core 2 Duo E4000/E6000, Core 2 Quad Q6600, Core 2 Extreme dual-core X6800, and quad-core QX6700 and QX6800 CPUs were affected by minor bugs.[9]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-8796836357015868125?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/8796836357015868125/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=8796836357015868125' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8796836357015868125'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/8796836357015868125'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/11/intel-core-2.html' title='Intel Core 2'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://3.bp.blogspot.com/_osm1u2yPFJw/STD8glAuEzI/AAAAAAAAABc/BNRS5iYZVIs/s72-c/Intel+core+2+duo.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-7316634322968003299</id><published>2008-11-28T10:14:00.001+05:00</published><updated>2008-11-28T10:15:49.047+05:00</updated><title type='text'>Pentium Dual-Core</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Pentium_Dual-Core"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 100px; height: 123px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SS9-cOi4-zI/AAAAAAAAABE/mOmi781_CqQ/s320/Pentium+Dual+Core.jpg" alt="" id="BLOGGER_PHOTO_ID_5273572712080014130" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Pentium Dual-Core brand refers to mainstream x86-architecture microprocessors from Intel. They are based on either the 32-bit Yonah or (with quite different microarchitectures) 64-bit Merom, Allendale, and, more recently, with the launch of the model E5200, Wolfdale core, targeted at mobile or desktop computers.&lt;br /&gt;&lt;br /&gt;Processor cores&lt;br /&gt;In 2006, Intel announced a plan[1] to return the Pentium brand from retirement to the market, as a moniker of low-cost Core architecture processors based on single-core Conroe-L, but with 1 MB cache. The numbers for those planned Pentiums were similar to the numbers of the latter Pentium Dual-Core CPUs, but with the first digit "1", instead of "2", suggesting their single-core functionality. Apparently, a single-core Conroe-L with 1 MB cache was not strong enough to distinguish the planned Pentiums from other planned Celerons, so it was substituted by dual-core CPUs, bringing the "Dual-Core" add-on to the "Pentium" moniker.&lt;br /&gt;&lt;br /&gt;Yonah&lt;br /&gt;The first processors using the brand appeared in notebook computers in early 2007. Those processors, named Pentium T2060, T2080, and T2130[2], had the 32-bit Pentium M-derived Yonah core, and closely resembled the Core Duo T2050 processor with the exception of having 1 MB L2 cache instead of 2 MB. All three of them had a 533 MHz FSB connecting CPU with memory. "Intel developed the Pentium Dual-Core at the request of laptop manufacturers".[3]&lt;br /&gt;&lt;br /&gt;Allendale&lt;br /&gt;Subsequently, on June 3, 2007, Intel released the desktop Pentium Dual-Core branded processors[4] known as the Pentium E2140 and E2160[5]. A E2180 model was released later in September 2007. These processors support the Intel64 extensions, being based on the newer, 64-bit Allendale core with Core microarchitecture. These closely resembled the Core 2 Duo E4300 processor with the exception of having 1 MB L2 cache instead of 2 MB[6]. Both of them had an 800 MHz FSB. They targeted the budget market above the Intel Celeron (Conroe-L single-core series) processors featuring only 512 kB of L2 cache. Such a step marked a change in the Pentium brand, relegating it to the budget segment rather than its former position as the mainstream/premium brand.&lt;br /&gt;An article on Tom's Hardware claims that these CPUs are highly overclockable.[7]&lt;br /&gt;&lt;br /&gt;Wolfdale&lt;br /&gt;The 45nm E5200 model was released by Intel on August 31, 2008, with a larger 2MB L2 cache over the 65nm E21xx series and the 2.5GHz clock speed. The E5200 model is also a highly overclockable processor, as the Taiwanese computer enthusiast "Coolaler" was able to overclock an enginnering sample of the E5200 to a high 4.0GHz clock speed.&lt;br /&gt;&lt;br /&gt;Comparison to the Pentium D&lt;br /&gt;Although using the Pentium name, the Pentium Dual Core is based on the Core technology, which can clearly be seen when comparing the specification to the Pentium D series. For example, the Pentium Dual Core has a maximum of 2MB of L2 Cache while the Pentium D processors can have up to 4MB of L2 Cache. But the major difference is the Pentium Dual Core processors only consume 65W peak while the Pentium D consumes a considerable 130W peak consumption which shows its relation to the Core power saving technology. Despite having a smaller L2 cache, the Pentium dual-core has proven to be much faster than the Pentium D under a variety of CPU intensive applications.[8]&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-7316634322968003299?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/7316634322968003299/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=7316634322968003299' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7316634322968003299'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/7316634322968003299'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/11/pentium-dual-core.html' title='Pentium Dual-Core'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SS9-cOi4-zI/AAAAAAAAABE/mOmi781_CqQ/s72-c/Pentium+Dual+Core.jpg' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-5305536057451030597</id><published>2008-11-27T12:49:00.003+05:00</published><updated>2008-11-28T10:16:35.045+05:00</updated><title type='text'>Pentium D</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Pentium_D"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 107px;" src="http://2.bp.blogspot.com/_osm1u2yPFJw/SS9-qdZDkPI/AAAAAAAAABM/_O-T3ldZiqo/s320/Pentium+D.JPG" alt="" id="BLOGGER_PHOTO_ID_5273572956583465202" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Pentium D[2] brand refers to two series of dual-core 64-bit x86 processors with the NetBurst microarchitecture manufactured by Intel. Each CPU comprised two single-core dies (CPUs) - next to each other - in one Multi-Chip Module package. The brand's first processor, codenamed Smithfield, was released by Intel on May 25, 2005. Nine months later, Intel introduced its successor, codenamed Presler[3], but without offering significant upgrades in design[4], still resulting in a relatively high power consumption[5]. By 2005, the NetBurst processors reached a clock speed barrier at 4 GHz due to a thermal (and power) limit exemplified by the Presler's 130 W Thermal Design Power[5] (a higher TDP requires additional cooling that can be prohibitively noisy or expensive). The future belonged to more efficient and slower clocked dual-core CPUs on a single die instead of two.[6] The final shipment date of the dual die Presler chips was August 8, 2008[7], which marked the end of the Pentium D brand and also the NetBurst microarchitecture.&lt;br /&gt;&lt;br /&gt;Pentium D Extreme Edition&lt;br /&gt;The dual-core CPU is capable of running multi-threaded applications typical in transcoding of audio and video, compressing, photo and video editing and rendering, and ray-tracing. The single-threaded applications alone, including most games, do not benefit from the second core of dual-core CPU compared to equally clocked single-core CPU. Nevertheless, the dual-core CPU is useful to run both the client and server processes of a game without noticeable lag in either thread, as each instance could be running on a different core. Furthermore, multi-threaded games benefit from the dual-core CPUs.&lt;br /&gt;&lt;br /&gt;As of 2008 many business and gaming applications are optimized for multiple cores.[citation needed] They ran equally well when alone on the Pentium D or older Pentium 4 branded CPUs at the same clock speed. However, the applications rarely run alone on computers under Microsoft Windows, Linux, BSD operating systems. In such multitasking environments, when antivirus software or another program is running in the background, or where several CPU-intensive applications are running simultaneously, each core of the Pentium D branded processor can handle different programs, improving the overall performance over its single-core Pentium 4 counterpart.&lt;br /&gt;&lt;br /&gt;Smithfield&lt;br /&gt;Smithfield was the first x86 dual-core microprocessor intended for desktop computers[citation needed]. Intel first launched Smithfield on April 16, 2005 in the form of the 3.2 GHz Hyper-threading enabled Pentium Extreme Edition 840. On May 26, 2005, Intel launched the mainstream Pentium D branded processor lineup with initial clock speeds of 2.8, 3.0, and 3.2 GHz with model numbers of 820, 830, and 840 respectively. In March 2006, Intel launched the last Smithfield processor, the entry-level Pentium D 805, clocked at 2.66 GHz with a 533 MT/s bus. The relatively cheap 805 was found to be highly overclockable; 3.5 GHz was often possible with good air cooling. Running it at over 4 GHz was possible with water cooling, and at this speed the 805 outperformed the top-of-the-line processors (May 2006) from both major CPU manufacturers (the AMD Athlon 64 FX-60 and Intel Pentium Extreme Edition 965) in many benchmarks including power consumption.[8]&lt;br /&gt;&lt;br /&gt;The 805 and 820 models had a 95 Watt TDP. All other models were rated at 130 watts.&lt;br /&gt;&lt;br /&gt;All Smithfield processor were made of two 90 nm Prescott cores on a single die with 1 MiB of Level 2 (L2) cache per core. Hyper-threading was disabled in all Pentium D 8xx-series Smithfields but was enabled in the Pentium Extreme Edition 840. Smithfield did not support VT—Intel's virtualization technology formerly called Vanderpool.&lt;br /&gt;&lt;br /&gt;All Pentium D processors supported Intel 64 (EM64T), XD Bit, and were manufactured for the LGA775 form factor. The only motherboards guaranteed to work with the Pentium D (and Extreme Edition) branded CPUs were those based on the 945-, 955-, 965- and 975-series Intel chipsets, as well as the nForce 4 SLI Intel Edition and ATI Radeon Xpress. The Pentium D 820 did not work with the nForce 4 SLI Intel Edition chipset due to some power design issues, though they were rectified in the X16 version. The 915- and 925-series chipsets did not work at all with the Smithfields, as they did not support more than one core (to prevent motherboard manufacturers from using them for Xeon branded motherboards, as had happened with the 875P chipset). The 865- and 875-series chipsets supported multiprocessing. Motherboards with them might be Pentium D compatible with an updated BIOS.&lt;br /&gt;&lt;br /&gt;A week after its launch, Intel officially denied a report in Computerworld Today Australia that the Pentium D branded CPUs included "secret" digital rights management features in their hardware that could be utilized by Microsoft Windows and other operating systems, but was not publicly disclosed. While Intel admitted that there were some DRM technologies in the 945- and 955-series chipsets, it stated that the extent of the technologies was exaggerated, and that the technologies in question had been present in Intel's chipsets since the 875P.&lt;br /&gt;&lt;br /&gt;Presler&lt;br /&gt;The last generation of Pentium D branded processors was the Presler identified by the product code 80553, and made of two 65 nm-process cores found also in Pentium 4 branded Cedar Mill CPUs. The Presler single package also comprised two single-core dies next to each other increasing its processing capability over single-core CPUs branded Pentium 4. The Presler was supported by the same chipsets as the Smithfield. It was produced using 65 nm technology similar to the Yonah. The Presler communicated with the system using an 800 MT/s FSB, and its two cores communicated also using the FSB, just as in the Smithfield. The Presler also included VT (Virtualization Technology, aka Vanderpool, although limited to the 9x0 models, and not in the 9x5 models), Intel 64, XD bit and EIST (Enhanced Intel SpeedStep Technology)[*]. The Presler was released in the first quarter of 2006 with a 2x2 MiB Level 2 cache. Its models included 915, 920, 925, 930, 935, 940, 945, 950, and 960 (with a respective 2.8, 2.8, 3.0, 3,0, 3.2, 3.2, 3.4, 3.4 and 3.6 GHz clock frequency).&lt;br /&gt;&lt;br /&gt;The Presler models 915, 920, 925, 930, 935 (all steppings), 940, 945, 950 (C1, D0 stepping) and 960 (D0 stepping) were rated at a 95 Watt TDP. All other models were rated at 130 Watt — a 37% increase in power consumption.[9]&lt;br /&gt;&lt;br /&gt;[*] The first batch of Presler processors (revision B1) had the EIST feature turned off by a microcode update because of stability issues. That affected only its power consumption, when idle, and thermal dissipation. Chips with working EIST started shipping in Q2 2006. They had a different S-Spec number which can be found in Intel errata documentation, or here.&lt;br /&gt;&lt;br /&gt;Smithfield XE&lt;br /&gt;Pentium Extreme Edition was introduced at the Spring 2005 Intel Developers Forum, not to be confused with the "Pentium 4 Extreme Edition" (an earlier, single-core processor occupying the same niche). The processor was based on the dual-core Pentium D branded Smithfield, but with Hyper-threading enabled, thus any operating system saw 4 logical processors (2 physical x 2 virtual cores). It also had an unlocked multiplier to allow overclocking. It was initially released as Intel Pentium Extreme Edition 840 at 3.20 GHz, in early 2005, at a price point of $999.99 (OEM version) or $1,200 (Retail). The only chipsets that worked with the Extreme Edition 840 were Intel's 955X, NVIDIA's nForce4 SLI Intel Edition, and ATi Radeon Xpress 200. Using a Pentium Extreme Edition branded CPU with an Intel 945-series chipset will disable Hyper-threading effectively turning the processor into a Pentium D branded equivalent.&lt;br /&gt;&lt;br /&gt;Presler XEThe Pentium Extreme Edition based on the dual-core Pentium D branded Presler was introduced as the 955 model, at 3.46 GHz, and used a 1066 MT/s FSB compared to the 800 MT/s in the non-Extreme edition. A second version, the 965 at 3.73 GHz followed in March 2006. Many overclockers, however, had been able to overclock the core to 4.26 GHz using air cooling simply by raising the unlocked CPU multiplier.&lt;br /&gt;&lt;br /&gt;The 'Presler Extreme Edition' would run only combined with the Intel 975X chipset (it could also work with the 955X chipset, though this combination was not supported by Intel). The i975X featured the ICH7R southbridge and supported all Socket T (LGA775) Pentium 4, Pentium D, and Pentium Extreme Edition branded processors.&lt;br /&gt;&lt;br /&gt;Successor&lt;br /&gt;The Pentium D brand was succeeded on July 27, 2006 by the Core 2 branded line of microprocessors with the Core architecture released as dual- and quad-core CPUs branded Duo, Quad, and Extreme.&lt;div class="blogger-post-footer"&gt;&lt;img width='1' height='1' src='https://blogger.googleusercontent.com/tracker/759053659177607007-5305536057451030597?l=patelintelamd.blogspot.com' alt='' /&gt;&lt;/div&gt;</content><link rel='replies' type='application/atom+xml' href='http://patelintelamd.blogspot.com/feeds/5305536057451030597/comments/default' title='Post Comments'/><link rel='replies' type='text/html' href='http://www.blogger.com/comment.g?blogID=759053659177607007&amp;postID=5305536057451030597' title='0 Comments'/><link rel='edit' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5305536057451030597'/><link rel='self' type='application/atom+xml' href='http://www.blogger.com/feeds/759053659177607007/posts/default/5305536057451030597'/><link rel='alternate' type='text/html' href='http://patelintelamd.blogspot.com/2008/11/pentium-d.html' title='Pentium D'/><author><name>Humayun</name><uri>http://www.blogger.com/profile/16606356781675393186</uri><email>noreply@blogger.com</email><gd:image rel='http://schemas.google.com/g/2005#thumbnail' width='16' height='16' src='http://img2.blogblog.com/img/b16-rounded.gif'/></author><media:thumbnail xmlns:media='http://search.yahoo.com/mrss/' url='http://2.bp.blogspot.com/_osm1u2yPFJw/SS9-qdZDkPI/AAAAAAAAABM/_O-T3ldZiqo/s72-c/Pentium+D.JPG' height='72' width='72'/><thr:total>0</thr:total></entry><entry><id>tag:blogger.com,1999:blog-759053659177607007.post-558158246272862803</id><published>2008-11-27T12:33:00.002+05:00</published><updated>2008-11-28T10:17:18.332+05:00</updated><title type='text'>Pentium 4</title><content type='html'>&lt;a onblur="try {parent.deselectBloggerImageGracefully();} catch(e) {}" href="http://en.wikipedia.org/wiki/Pentium_4"&gt;&lt;img style="margin: 0pt 10px 10px 0pt; float: left; cursor: pointer; width: 200px; height: 150px;" src="http://1.bp.blogspot.com/_osm1u2yPFJw/SS9-1GV_VAI/AAAAAAAAABU/FC-rfmfU_aU/s320/Pentium+4.jpg" alt="" id="BLOGGER_PHOTO_ID_5273573139375150082" border="0" /&gt;&lt;/a&gt;&lt;br /&gt;The Pentium 4 brand refers to Intel's line of single-core mainstream desktop and laptop central processing units (CPUs) introduced on November 20, 2000[1] (August 8, 2008 was the date of last shipments of Pentium 4s[2]). They had the 7th-generation architecture, called NetBurst, which was the company's first all-new design since 1995, when the Intel P6 architecture of the Pentium Pro CPUs had been introduced. NetBurst differed from the preceding Intel P6 - of Pentium III, II, etc. - by featuring a very deep instruction pipeline to achieve very high clock speeds[3] (up to 4 GHz) limited only by max. power consumption (TDP) reaching up to 115 W in 3.6–3.8 GHz Prescotts and Prescotts 2M[4] (a high TDP requires additional cooling that can be noisy or expensive). In 2004, the initial 32-bit x86 instruction set of the Pentium 4 microprocessors was extended by the 64-bit x86-64 set.&lt;br /&gt;&lt;br /&gt;Pentium 4 CPUs introduced the SSE2 and SSE3 instruction sets to accelerate calculations, transactions, media processing, 3D graphics, and games. They also integrated Hyper-threading (HT), a feature to make one physical CPU work as two logical and virtual CPUs. The Intel's flagship Pentium 4 also came in a low-end version branded Celeron (often referred to as Celeron 4), and a high-end derivative, Xeon, intended for multiprocessor servers and workstations. In 2005, the Pentium 4 was complemented by the Pentium D and Pentium Extreme Edition dual-core CPUs.&lt;br /&gt;&lt;br /&gt;Architecture&lt;br /&gt;In benchmark evaluations, the advantages of the NetBurst architecture were not clear. With carefully optimized application code, the first P4 did outperform Intel's fastest Pentium III, as expected. But in legacy applications with many branching or x87 floating-point instructions, the P4 would merely match or even fall behind its predecessor. Its main handicap was a shared uni-directional bus. Furthermore, the NetBurst architecture dissipated more heat than any previous Intel or AMD processor.&lt;br /&gt;&lt;br /&gt;As a result, the Pentium 4's introduction was met with mixed reviews: Developers disliked the Pentium 4, as it posed a new set of code optimization rules. For example, in mathematical applications AMD's much lower-clocked Athlon easily outperformed the Pentium 4, which would only catch up if software were re-compiled with SSE2 support. Tom Yager of Infoworld magazine called it "the fastest CPU - for programs that fit entirely in cache". Computer-savvy buyers avoided Pentium 4 PCs due to their price-premium and questionable benefit. In terms of product marketing, the Pentium 4's singular emphasis on clock frequency (above all else) made it a marketer's dream. The result of this was that the NetBurst architecture was often referred to as a marchitecture by various computing websites and publications during the life of the Pentium 4.&lt;br /&gt;&lt;br /&gt;The two classical metrics of CPU performance are IPC (instructions per cycle) and clock-frequency. While IPC is difficult to quantify (due to dependence on the benchmark application's instruction mix), clock-frequency is a simple measurement yielding a single absolute number. Unsophisticated buyers would simply associate the highest clock-rating with the best product, and the Pentium 4 was the undisputed megahertz champion. As AMD was unable to compete by these rules, it countered Intel's marketing advantage with the 'megahertz myth campaign.' AMD product marketing used a "PR-rating" system, which assigned a merit value based on relative-performance to a baseline machine.&lt;br /&gt;At the launch of the P4, Intel stated NetBurst was expected to scale to 10 GHz (over several fabrication process generations). However, the NetBurst architecture ultimately hit a frequency ceiling far below expectation—the fastest retail Pentium 4 never exceeded 4 GHz. Intel had not anticipated a rapid upward scaling of transistor power leakage that began to occur as the chip reached the 90 nm process node and smaller. This new power leakage phenomenon, along with the standard thermal output, created cooling and clock scaling problems as clock speeds increased. Reacting to these unexpected obstacles, Intel attempted several core redesigns ("Prescott" most notably) and explored new manufacturing technologies. Nothing solved their problems though and in 2005–06 Intel shifted development away from NetBurst to focus on the cooler-running Pentium M architecture. In March 2006, Intel announced the Intel Core microarchitecture, which puts greater emphasis on energy efficiency and performance per clock. The final NetBurst-derived products were released in 2006, with all subsequent product families switching exclusively to the Intel Core microarchitecture&lt;br /&gt;&lt;br /&gt;Processor cores&lt;br /&gt;The Pentium 4 has an IHS (Integrated Heat Spreader) that prevents the CPU core from accidentally getting damaged when mounting and unmounting cooling solutions. Prior to the IHS, a CPU shim was sometimes used by people worried about damaging the core. Overclockers sometimes removed the IHS on Socket 478 chips to allow for more direct heat transfer. However, on LGA775 chips the IHS is directly welded to the processor core, meaning that the IHS cannot be removed easily.&lt;br /&gt;&lt;br /&gt;Willamette&lt;br /&gt;Willamette, project code name for the first Pentium 4 architecture implementation, experienced long delays in completion of its design process. The project was started in 1998, when Intel saw the Pentium II as their permanent line. At that time, the Willamette core was expected to operate at frequencies of around 1 GHz, maximum. However, Willamette release delays saw the introduction of the Pentium III prior to its completion. Since the radical differences in these architectures meant Intel could not market Willamette as a Pentium III, it was named Pentium 4.&lt;br /&gt;&lt;br /&gt;In November 2000, Intel released the Willamette-based Pentium 4 at speeds of 1.4 and 1.5 GHz. Most industry experts regarded the initial release as a stopgap product, introduced before it was truly ready. According to these experts, the Pentium 4 was released because the competing Thunderbird-based AMD Athlon was outperforming the aging Pentium III, and further improvements to the P-III were not yet possible. This Pentium 4 was produced using a 0.18 micrometer (180 nm) process and initially used Socket 423, with later revisions moving to Socket 478. These variants were identified by the Intel product codes 80528 and 80531 respectively.&lt;br /&gt;&lt;br /&gt;On the test bench, the Willamette was somewhat disappointing to analysts in that not only was it unable to outperform the Athlon and the highest-clocked Pentium IIIs in all testing situations, it was not clearly superior to even the budget segment's AMD Duron.[5] Although introduced at a price of US$819 (in 1000 unit quantities), it sold at a modest but respectable rate, handicapped somewhat by the requirement of relatively expensive Rambus Dynamic RAM (RDRAM). The Pentium III remained Intel's top selling chip, with the Athlon also selling slightly better than the Pentium 4.&lt;br /&gt;&lt;br /&gt;In January 2001, a still slower 1.3 GHz model was added to the range, but over the next twelve months, Intel gradually started reducing AMD's leadership in performance. April 2001 brought the 1.7 GHz P4, the first one to provide performance clearly superior to the old Pentium III. July saw 1.6 and 1.8 GHz models and in August 2001, Intel released 1.9 and 2.0 GHz Pentium 4s. In the same month, they released the 845 chipset that supported much cheaper PC133 SDRAM instead of RDRAM.[6] While SDRAM was much slower than RDRAM and severely hampered the bandwidth-hungry Pentium 4, the fact that it was so much cheaper caused the Pentium 4's sales to grow considerably.[6] The new chipset allowed the P4 to displace the Pentium III virtually overnight, becoming the top-selling processor on the market.&lt;br /&gt;&lt;br /&gt;The Willamette code name is derived from the Willamette Valley region of Oregon, where a large number of Intel manufacturing facilities are located.&lt;br /&gt;&lt;br /&gt;Northwood&lt;br /&gt;In October 2001, the Athlon XP regained a clear lead for AMD, but in January 2002, Intel released Pentium 4s with their new Northwood core at 1.6, 1.8, 2.0 and 2.2 GHz.[7][8] Northwood (product code 80532) combined an increase in the secondary cache size from 256 KiB to 512 KiB (increasing the transistor count to 55 million, up from 42 million) with a transition to a new 130 nm (0.13 micrometer) fabrication process.[8] By making the chip out of smaller transistors, chips can run at higher clocks or at the same speed while producing less heat.&lt;br /&gt;&lt;br /&gt;A 2.4 GHz P4 was released in April 2002, and the bus speed increased from 400 MT/s to 533 MT/s for a 2.26 GHz, 2.4 GHz, and 2.53 GHz part in May, 2.66 GHz and 2.8 GHz parts in August, and a 3.06 GHz Pentium 4 arrived in November. With Northwood, the Pentium 4 came of age. The battle for performance leadership remained competitive (as AMD introduced faster versions of the Athlon XP) but most observers agreed that the fastest Northwood P4 was usually ahead of its rival. This was particularly so in the summer of 2002, when AMD's changeover to a 130 nm production process did not help the "Barton" and "Thoroughbred" Athlon XP CPUs clock high enough to overcome the advantage of P4s in the 2.4 to 2.8 GHz range.[9]&lt;br /&gt;&lt;br /&gt;The 3.06 GHz processor acquired Hyper-Threading technology that first appeared in Xeon, enabling multiple threads to be run together by duplicating some parts of the processor in order to let the operating system believe that there are two logical processors.&lt;br /&gt;&lt;br /&gt;In April 2003, Intel launched new 800 MT/s FSB variants, ranging from 2.4 to 3.0 GHz.[10] This was meant to help the Pentium 4 better compete with AMD's Opteron line of processors. However, when Opteron was launched, due to its server-oriented positioning motherboard manufacturers didn't initially build motherboards with AGP controllers. Because AGP was the primary graphics expansion port at the time, this missing feature prevented the Opteron from encroaching on the Pentium 4's market segment. AMD did boost the Athlon XP's bus speed from 333 MT/s to 400 MT/s, but it wasn't enough to hold off the new 3.0 GHz P4.[11] A 3.2 GHz Pentium 4 Northwood variant was launched in June and a final 3.4 GHz version was launched in early 2004.&lt;br /&gt;&lt;br /&gt;Overclocking early stepping Northwood cores yielded a startling phenomenon. When core voltage (Vcore) was increased past 1.7 V, the processor would slowly become more unstable over time, before dying and becoming totally unusable. This became known as Sudden Northwood Death Syndrome, which is caused by electromigration.[12]&lt;br /&gt;&lt;br /&gt;Mobile Pentium 4&lt;br /&gt;The Mobile Intel Pentium 4 Processor [1] was released to address the problem of putting a full Pentium 4 desktop chip into a laptop, which some manufacturers were doing. The Mobile P4 still used 70 W of power, which let it bridge the gap between the full Pentium 4 (using about 82 W), and the Mobile Pentium 4 M (using about 35 W).&lt;br /&gt;&lt;br /&gt;Mobile Pentium 4 M&lt;br /&gt;Also based on the Northwood core, the Mobile Intel Pentium 4 Processor - M [2] was released on April 23, 2002 and included Intel's SpeedStep and Deeper Sleep technologies, and Hyper-Threading in some models. Intel's naming conventions made it difficult at the time of the processor's release to identify the processor model.There was the Pentium III mobile chip (or the PIII-M), the Mobile Pentium 4 M (or the P4-M), the Mobile Pentium 4 (or the Mobile P4), and then just the Pentium M which itself was based on the Pentium III. Its TDP is about 35 Watts in most applications. This lowered power consumption was due to lowered core voltage, and other features mentioned previously.&lt;br /&gt;&lt;br /&gt;Gallatin (Extreme Edition)&lt;br /&gt;In September 2003, at the Intel Developer Forum, the Pentium 4 Extreme Edition (P4EE) was announced, just over a week before the launch of Athlon 64, and Athlon 64 FX (AMD64 FX). The design was mostly identical to Pentium 4 (to the extent that it would run in the same motherboards), but differed by an added 2 MiB of Level 3 cache. It shared the same Gallatin core as the Xeon MP, though in a Socket 478 form factor (as opposed to Socket 603 for the Xeon MP) and with an 800 MT/s bus, twice as fast as that of the Xeon MP. An LGA775 version is also available.&lt;br /&gt;&lt;br /&gt;While Intel maintained that the Extreme Edition was aimed at gamers, some viewed it as an attempt to steal the Athlon 64's launch thunder, nicknaming it the "Emergency Edition". With a price tag of ~$1000, it was also referred to as the "Expensive Edition" or "Extremely Expensive". Many condemned Intel for cannibalizing the Xeon line, but no such complaints were aimed at AMD's Athlon 64 FX-51, which was merely a repackaged Opteron 148.&lt;br /&gt;&lt;br /&gt;The effect of the added cache was somewhat variable. In office applications, the Extreme Edition was generally a bit slower than the Northwood, owing to higher latency added by the L3 cache. Some games benefited from the added cache, particularly those based on the Quake III and Unreal engines. However, the area which improved the most was multimedia encoding, which was not only faster than the Pentium 4, but also faster than both Athlon 64s.&lt;br /&gt;&lt;br /&gt;A slight performance increase was achieved in late 2004 by increasing the bus speed from 800 MT/s to 1066 MT/s. Only one Gallatin-based chip at 3.46 GHz was released before the Extreme Edition was migrated to the Prescott core. The new 3.73 GHz Extreme Edition had the same features as a 6x0-sequence Prescott 2M, but with a 1066 MT/s bus. In practice however, the 3.73 GHz Extreme Edition almost always proved to be slower than the 3.46 GHz version.&lt;br /&gt;&lt;br /&gt;The 'Pentium 4 Extreme Edition' should not be confused with a similarly-named later model, the 'Pentium Extreme Edition', which is based on the dual-core Pentium D.&lt;br /&gt;&lt;br /&gt;Prescott&lt;br /&gt;On February 1, 2004, Intel introduced a new core codenamed "Prescott". The core used a 90 nm process for the first time, and "[it] is also a major reworking of the Pentium 4's microarchitecture—major enough that some analysts are surprised Intel didn't opt to call this processor the Pentium 5".[13] Although a Prescott clocked at the same rate as a Northwood, benchmarks show that a Northwood performed slightly better than a Prescott in gaming applications. However, with video editing and other multimedia software, the Prescott's extra cache and SSE3 instructions give it a clear clock-for-clock advantage over the Northwood. The Prescott architecture allows it to be easily set at higher clock-rates. (See Overclocking.) The fastest mass-produced Prescott-based processor was clocked at 3.8GHz.&lt;br /&gt;&lt;br /&gt;Upon release, many reviewers mistakenly concluded that the Prescott generated approximately 40% more heat clock-for-clock than the Northwood, and almost every review of it was negative, earning it the sobriquet PresHot. In reality, the core temperature sensor of the Prescott gives higher readings than the Northwood core temperature sensor, meaning that the increase in heat generated for CPU work done is believed to be around the 10% range. Overclockers mistakenly believed that the Northwood was a better choice for overclocking, while in reality the Prescott would outperform the Northwood and generate less heat in overclocked conditions. At stock speeds (or less ambitious overclocks) however, Prescott was generally still hotter and slower than Northwood. A shift in socket type (from Socket 478 to LGA775) was expected to reduce the heat to more acceptable levels, but in fact proved to have the opposite effect, with power requirements increasing by a further 10%. However, the LGA775 reference cooler and mounting system were somewhat better designs, so average temperatures were slightly lowered. Subsequent revisions to the processor by Intel engineers were expected to reduce average temperatures, but this never happened outside of the lowest speed grades. Prescott Pentium 4s were given the product codes 80546 (Socket 478) and 80547 (LGA775).&lt;br /&gt;&lt;br /&gt;Finally, the thermal problems were so severe, Intel decided to abandon the Prescott architecture altogether, and attempts to roll out a 4 GHz part were abandoned, as a waste of internal resources. Intel realized that it would be wiser to head towards a "wider" CPU architecture with a lower clock speed to keep heat levels down while still increasing the throughput of the CPU. Also of concern was the fact that a review showed that in games, it took a 5.2 GHz Prescott core to soundly beat the performance of a 64-bit Athlon FX-55 that clocked at 2.6 GHz.[3] Considering Intel boasted at launch the Pentium 4 architecture was intended to support up to 10 GHz operation with further reductions of core size, this can be seen as one of the most significant, certainly most public, engineering shortfalls in Intel’s history, as Intel engineers only planned for a stock 9 GHz P4.[14] Overclockers did not break the 8 GHz barrier until the end of the Pentium 4 line on 3.0-3.6 GHz CPUs, which by then had a dwindling enthusiast user base.[15] This also meant that while Northwood ultimately achieved clockspeeds 70% higher than Willamette did, Prescott only managed a 12% rise o
